Rewrite a fast GEMV path for two goals:
1. Avoid cache aliasing issues on CPUs with 4-way set associative L1 cache. That includes Cortex-A53. 2. Be a good basis to port to assembly. PiperOrigin-RevId: 192152277
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1. Avoid cache aliasing issues on CPUs with 4-way set associative L1 cache. That includes Cortex-A53. 2. Be a good basis to port to assembly. PiperOrigin-RevId: 192152277