[XLA:CPU] Make one of the tile dimensions in the LLVM IR GEMV tunable.

The tiling dimension corresponding to the number of vector registers in the tile
can be changed easily.  Expose this value as a backend specific flag so that we
can experiment with it to find a good default value.

This CL also fixes a bug exposed by a variable tiling factor in the row major
GEMV implementation.  This wasn't caught before because having tile_rows ==
tile_cols hides the bug.

PiperOrigin-RevId: 175258553