Add the new jumbo opcodes to dx...almost.

This change adds the new opcodes while simultaneously preventing
them from actually being emitted, the prevention being controlled
by a new flag in InsnFormat.

Empirically speaking, we already have latent demand for the new
opcodes -- specifically because they allow for wider register
references than their wee companions -- and so we can't actually
enable their generation until the VM is prepared to execute them.

If you're wondering why dx without the new opcodes doesn't crap out on
the register references in question, it's because there's code in dx
which will expand an instruction that has non-fitting register
references into a sequence of two or more instructions, where it
shuffles values into and out of usable registers before and/or after
the instruction. When we turn on the jumbo opcodes, at least some
of these register shuffles will immediately get to go away.

Change-Id: I3f921ab07efa4944d7526fa48534d69f508ac249