MIPS64: Align register spills on 8-byte boundaries in slow paths
64-bit loads/stores would otherwise be split into pairs of 32-bit ones. Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target-run-test-optimizing (MIPS64R6) in QEMU Change-Id: I4846d11b52b71507dfd5ca2e27b3f2a5befcc58e
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