Commit c01dc29b authored by Evgeny Astigeevich's avatar Evgeny Astigeevich Committed by Vladimir Marko
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ART: Optimize use of registers for CRC32.update intrinsic 

Use a VIXL scratch register and specify the output register does not
overlap with input registers.

Test: m test-art-target-gtest
Test: m test-art-host-gtest
Test: art/test.py --target --optimizing
Test: art/test.py --host --optimizing
Test: 580-crc32
Change-Id: If2f4b65eb1dfd5aace385dd3e571376a9867c662
parent ea1550c1
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