Commit bde6ae1c authored by Anton Kirilov's avatar Anton Kirilov
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ARM64: Ensure stricter alignment when loading and storing register pairs 

The impetus for this change is the fact that loads that cross a 64 byte
boundary and stores that cross a 16 byte boundary are a performance issue
on Cortex-A57 and A72.

Change-Id: I81263dc72272192ad2d190b741a955f175880461
parent 47fe36d8
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