Commit 9ee801f5 authored by Dmitry Petrochenko's avatar Dmitry Petrochenko
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Add x86_64 code generation support 



Utilizes r0..r7 in register allocator, implements spill/unsill
core regs as well as operations with stack pointer.

Change-Id: I973d5a1acb9aa735f6832df3d440185d9e896c67
Signed-off-by: default avatarDmitry Petrochenko <dmitry.petrochenko@intel.com>
parent cd6e04f7
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