MIPS: Correct instruction alignment.
Test: booted MIPS32R2 in QEMU Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Change-Id: Iff61353bc9e787e65f3f17d8938d4b5561d2a603
Loading
Please sign in to comment
Test: booted MIPS32R2 in QEMU Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Change-Id: Iff61353bc9e787e65f3f17d8938d4b5561d2a603