Ensure stack maps are 4 byte aligned.

With the recent move to gcc 4.9, we are hitting alignment
SIGBUS on ARM. The reason is that gcc will optimize two consecutive
32bits loads into one 64bits load, and the instruction (ldrd)
will fail if the data is not aligned.

Also removed the emission of mapping table when a method is optimized.
The information can be found in the StackMap itself.

Change-Id: Icf79406c18a3f4db3c05d52fc2c0dd2e35bf0f8f