Commit 164306e7 authored by Vladimir Marko's avatar Vladimir Marko
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Optimizing: Improve shift simplification, x >>> 64. 

Simplify shifts by a multiple of bit size, not just 0.
ARM codegen does not expect to see such shifts and it
is guarding against them with a DCHECK().

Bug: 27638111
Change-Id: I3ae8383d7edefa0facd375ce511e7a226d5468a1
parent 5681b663
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