- Jan 27, 2015
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Patrick Daly authored
Describe the cache format used in 8992. Change-Id: I40149802a68527b9b043a643f8d5c18b67916924
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- Jan 12, 2015
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Patrick Daly authored
Decode the tag-ram according to the processor and cache type. Print the decoded information alongside each cacheline in a table format. Support A53 L1 Data Caches. Support A57 L1 Instruction and Data Cache, L2 Cache. Change-Id: I3e74affb69a91b1ca1399be604366e7f1fb0cd27
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