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Commit 643ee35d authored by Mohammed Khajapasha's avatar Mohammed Khajapasha
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ldrpv2: cachedumlib: Correct the L1 ICache dump format for A53

Correcting the A53 ICache dump format for parsing the instruction cache
dump.

Change-Id: Idc2d9dcba1a879461e4470fa9afdb162c50f251b
parent eceefe6d
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...@@ -231,16 +231,16 @@ class L1_ICache_A53(CacheDumpType_v1): ...@@ -231,16 +231,16 @@ class L1_ICache_A53(CacheDumpType_v1):
self.unsupported_header_offset = 0 self.unsupported_header_offset = 0
self.TagSize = 2 self.TagSize = 2
self.LineSize = 16 self.LineSize = 16
self.NumSets = 0x80 self.NumSets = 0x100
self.NumWays = 2 self.NumWays = 2
def parse_tag_fn(self, output, data, nset, nway): def parse_tag_fn(self, output, data, nset, nway):
if self.TagSize != 2: if self.TagSize != 2:
raise Exception('cache tag size mismatch') raise Exception('cache tag size mismatch')
valid = (data[0] >> 1) & 0x1 valid = (data[0] >> 29) & 0x3
n = (data[0] >> 0) & 0x1 n = (data[0] >> 28) & 0x1
addr = (data[0] >> 0) & 0xffffffff addr = (data[0] >> 0) & 0xfffffff
addr = (addr << 12) | (nset << 6) addr = (addr << 12) | (nset << 6)
output.append(valid) output.append(valid)
......
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