dcc_parser: Add suppport for parsing DCC write

This change adds support for parsing DCC SRAM data with write support.
DCC does not output any data to the SRAM for write operation. So, we
will be ignoring all the write configuration in the list.

Change-Id: I2841913f4d10214f1b3e3eae49757c5564cf5425

dcc_parser/dcc_parser.py

@@ -83,6 +83,7 @@ def read_config(config_pt):
         link_descriptor = 0x3 << 30
         loop_descriptor = 0x1 << 30
         rd_mod_wr_descriptor = 0x1 << 31
+	dcc_write_ind = 0x1 << 28
         link_second_arg = 7
         #indicates end of list
         on_zero_link_len = -1
@@ -98,8 +99,11 @@ def read_config(config_pt):
             break
 
         descriptor = val & (0x3 << 30)
+	read_write_ind = val & (0x1 << 28)
 
-        if descriptor == address_descriptor:
+	if read_write_ind == dcc_write_ind:
+            config_pt.seek(8, 1)
+        elif descriptor == address_descriptor:
             base = ((val & 0x0FFFFFFF) << 4)
             offset = 0
         elif descriptor == link_descriptor: