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Commit 162f7411 authored by Mitchel Humpherys's avatar Mitchel Humpherys
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lrdpv2: use explicitly-sized types in Iommu parsing

The `RamParse.read_word' function reads a different number of bits
depending on the architecture (it reads 32 bits on ARM and 64 bits on
ARM64). We were relying on it to only read 32 bits in a few places, so
things were broken on ARM64. Fix this by using explicitly-sized reads
where appropriate.

Change-Id: Id717787c4e7df344964387d245b732d9fffb1397
parent ad517ab5
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......@@ -39,13 +39,13 @@ class IommuLib(object):
node + self.ramdump.field_offset('struct msm_iommu_ctx_drvdata', 'name'))
ctxdrvdata_num_offset = self.ramdump.field_offset(
'struct msm_iommu_ctx_drvdata', 'num')
num = self.ramdump.read_word(node + ctxdrvdata_num_offset)
num = self.ramdump.read_u32(node + ctxdrvdata_num_offset)
if ctx_drvdata_name_ptr != 0:
name = self.ramdump.read_cstring(ctx_drvdata_name_ptr, 100)
ctx_list.append((num, name))
def _iommu_domain_func(self, node, domain_list):
domain_num = self.ramdump.read_word(self.ramdump.sibling_field_addr(
domain_num = self.ramdump.read_u32(self.ramdump.sibling_field_addr(
node, 'struct msm_iova_data', 'node', 'domain_num'))
domain = self.ramdump.read_word(self.ramdump.sibling_field_addr(
node, 'struct msm_iova_data', 'node', 'domain'))
......@@ -81,13 +81,13 @@ class IommuLib(object):
if priv_pt_offset is not None:
pg_table = self.ramdump.read_word(
priv_ptr + priv_pt_offset + pgtable_offset)
redirect = self.ramdump.read_word(
redirect = self.ramdump.read_u32(
priv_ptr + priv_pt_offset + redirect_offset)
else:
# On some builds we are unable to look up the offsets so hardcode
# the offsets.
pg_table = self.ramdump.read_word(priv_ptr + 0)
redirect = self.ramdump.read_word(priv_ptr + self.ramdump.sizeof('void *'))
redirect = self.ramdump.read_u32(priv_ptr + self.ramdump.sizeof('void *'))
# Note: On some code bases we don't have this pg_table and redirect in the priv structure (see msm_iommu_sec.c). It only
# contains list_attached. If this is the case we can detect that by checking whether
......
......@@ -90,7 +90,7 @@ class IOMMU(RamParser):
def print_sl_page_table(self, pg_table):
sl_pte = pg_table
for i in range(0, self.NUM_SL_PTE):
phy_addr = self.ramdump.read_word(sl_pte, False)
phy_addr = self.ramdump.read_u32(sl_pte, False)
if phy_addr is not None: # and phy_addr & self.SL_TYPE_SMALL:
read_write = '[R/W]'
if phy_addr & self.SL_AP2:
......@@ -111,7 +111,7 @@ class IOMMU(RamParser):
fl_pte = pg_table
for i in range(0, self.NUM_FL_PTE):
# for i in range(0,5):
sl_pg_table_phy_addr = self.ramdump.read_word(fl_pte)
sl_pg_table_phy_addr = self.ramdump.read_u32(fl_pte)
if sl_pg_table_phy_addr is not None:
if sl_pg_table_phy_addr & self.FL_TYPE_TABLE:
self.out_file.write('FL_PTE[%d] = %x [4K/64K]\n' %
......@@ -134,7 +134,7 @@ class IOMMU(RamParser):
def get_mapping_info(self, pg_table, index):
sl_pte = pg_table + (index * 4)
phy_addr = self.ramdump.read_word(sl_pte, False)
phy_addr = self.ramdump.read_u32(sl_pte, False)
current_phy_addr = -1
current_page_size = SZ_4K
current_map_type = 0
......@@ -201,7 +201,7 @@ class IOMMU(RamParser):
tmp_mapping = {}
fl_pte = pg_table
for fl_index in range(0, self.NUM_FL_PTE):
fl_pg_table_entry = self.ramdump.read_word(fl_pte)
fl_pg_table_entry = self.ramdump.read_u32(fl_pte)
if fl_pg_table_entry is not None:
if fl_pg_table_entry & self.FL_TYPE_SECT:
......
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