[MIPSR6] Use C-coded string ops on mips32r6/mips64r6
The existing assembler code uses deprecated lwl/lwr/swl/swr ops. Replacing those with misalignment-forgiving lw/sw ops may involve careful performance tuning. (cherry picked from commit bc5a3ec6) Change-Id: I35167da27f2d406339b7f24b4a1fb270c87bc12e
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