Commit 3bfa0fd3 authored by Henrik Smiding's avatar Henrik Smiding Committed by yijunx.zhu
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Add Silvermont architecture cache sizes 



Adds Silvermont specific cache sizes for bionic optimizations.

Change-Id: Ib992f530b8c485121b2874470fd6bed2212adb0f
Signed-off-by: default avatarHenrik Smiding <henrik.smiding@intel.com>
parent c19972a4
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