Commit af52bcd5 authored by Taniya Das's avatar Taniya Das Committed by Gerrit - the friendly Code Review server
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clk: qcom: bengal: clock driver updates for GPU & NPU



GPU CRC is enabled, so set the divider for PLL frequency to be
calculated properly.

As the NPU XO clock is marked critical there is vote on XO clock which
blocks the XO, thus remove the parent mapping.

Change-Id: I173220e7e698fcc2fbaa193525016c91b251c2c5
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 802aad74
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