clk: qcom: Update frequency plan for display PLL for LITO

The frequency plan for mdss_rot_clk is updated to limit at 300MHz max,
thus update the fmax table and frequency table to take care of the same.

While at it update the PLL frequency and the mdss mdp clock frequency
table for the RCG divider to achieve the corresponding frequency.

Change-Id: Ia5d6c1b9288579633c17714ee041b5c355555389
Signed-off-by: Taniya Das <tdas@codeaurora.org>