Add Intel BMI1, BMI2, INVPCID, LZCNT instructions.

Reference: http://www.intel.com/software/avx rev11 spec

Also add appropriate CPU bits and directive handling for these.

Currently we have no good way of handling an "or" of instruction bits
(in this case needed for LZCNT, where it's either AMD or LZCNT).  For
now, make it LZCNT only.

Contributed by: Mark Charney <mark.charney@intel.com>

Part of [#227].