Commit fa1ebc6a authored by Silviu Baranga's avatar Silviu Baranga
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Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the...

Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155001 91177308-0d34-0410-b5e6-96231b3b80d8
parent e546c4c9
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