Commit ec8cdb04 authored by Andrea Di Biagio's avatar Andrea Di Biagio
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[X86][BtVer2] Add missing ReadAfterLd to RM variants of AVX horizontal adds and 

most vector logic instructions.

Fixed a few InstRW that forgot to specify a ReadAfterLd for the register input
operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328867 91177308-0d34-0410-b5e6-96231b3b80d8
parent 70a047dc
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