Commit e574f76b authored by Simon Pilgrim's avatar Simon Pilgrim
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[SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG and CONCAT_VECTORS support to SimplifyDemandedBits 

Fix for AVX1 masked load/store regression on D52964

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344043 91177308-0d34-0410-b5e6-96231b3b80d8
parent 244c796c
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