[Hexagon] Avoid creating invalid offsets in packetizer

Two memory instructions with a dependency only on the address register
between the two (the first one of them being post-incrememnt) can be
packetized together after the offset on the second was updated to the
incremement value. Make sure that the new offset is valid for the
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328897 91177308-0d34-0410-b5e6-96231b3b80d8