[X86][BtVer2] Add tests that show how ReadAfterLd is missing for some

instructions.

In the Btver2 model, there are a few InstRW overrides that don't specify a
ReadAfterLd for the register input operand.

As a result, a few AVX variants of horizontal operations and most vector logic
operations with a folded memory operand don't have a ReadAdvance info associated
to their input register operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328865 91177308-0d34-0410-b5e6-96231b3b80d8