platform: msm_shared: Correct invalidate cache actions

When invalidate cache, address and size must be aligned
to CACHE_LINE, if not, the arch_invalidate_cache_range
api itself will do the alignment, that may cause valid
data lost which is not yet cleaned to cache.

So correct invalidate cache actions by use CACHE_LINE
aligned address and size explicitly. Use memalign,
STACKBUF_DMA_ALIGN or BUF_DMA_ALIGN to alloc space
which will used for cache invalidate and have the size
alloc Round to CACHE_LINE.

Change-Id: I30c3f101481fd259c631c48501988fd403a8627b