Commit 7dafc0c9 authored by Clément Viel's avatar Clément Viel Committed by Victor Liu
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dw3000 : change PLL calibration routine 



- clear PLL lock bit when configuring rf
- disable Pre-buffer-enable for Ch9 PLL calibration for E0
- Clear ICAS, RCAS and CH5_CAL_PREBUF bits in PLL_CAL_ID register

Bug: 196842697
Change-Id: I3e42b5c36feec29c8fdbbc5c128155fb7b1d9915
Signed-off-by: default avatarJean-Michel RIOT <jean-michel.riot@qorvo.com>
parent bdc5e304
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