msm: spm: Do not prevent writing zero to SPM address offset.

The current driver programs the Krait SPM to reset the start address
register after a successful completion of a low power mode
sequence. Based on the above assumption, the driver doesn't write a zero
to the sequence start address. The clock gating power mode is programmed
at the zeroth offset of the command sequence, therefore minimizing the
enter and exit latency of clock gating mode.

During idle power collapse, an interrupt could be pending when the Krait
executes a WFI. This causes Krait to return from WFI without SPM executing
the programmed low power modes. Thereby, when Krait executes a WFI
during clock gating SPM executes the Power collapse mode previously
programmed. This results in the idle thread's stack pointer being
corrupted when Krait resumes through the warmboot path.

Signed-off-by: Maheshkumar Sivasubramanian <msivasub@codeaurora.org>