MLK-11117-02 ARM: imx6: update the clk switch code on imx6ul

Due to the clk tree info for AXI/AHB updating on i.MX6UL, the
busfreq enter/exit on i.MX6UL also need to be updated to align
to these changes. The AXI/AHB should be source from pll2_bus, and
the AHB clock divider value need to be set to 4 to make sure when
exiting from low bus mode, the AHB clock is also the original rate.

Signed-off-by: Bai Ping <b51503@freescale.com>