Commit a798e63e authored by Sandor Yu's avatar Sandor Yu Committed by Nitin Garg
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MLK-11859: dts: Fix imx7D mipi csi reset bit error 



There is a error in i.MX7D RM RevB.
Actually the register of SRC_MIPIPHY_RCR(src offset 0x28)
bit 1 for MIPI PHY Master Reset
bit 2 for MIPI PHY Slave Reset.

Signed-off-by: default avatarSandor Yu <R01008@freescale.com>
(cherry picked from commit 4f3128a79c023319c9e21690be866dc46a9d6816)
parent a5c67318
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