msm: acpuclock-7201: Add acpu freq. tables for PLL1 at 737/589 MHz

PLL1 output frequency is now changed to 737.28MHz and 589.824MHz
for GSM and CDMA configuration resp. to achieve the 33% duty
cycle for adsp.

Add the required acpu frequency tables to reflect the same.

Tables for 245/196 PLL1 freq. are still kept to keep the backward
compatibility.

CRs-Fixed: 319835
Change-Id: Icae4c444efd693e87a26bf834727c04b30e1da88
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>