Commit 78387f42 authored by Robby Cai's avatar Robby Cai Committed by Nitin Garg
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MLK-10481 ARM: dts: imx7d-sdb: set pixelclk-active to 0 for AT043TN24 panel 



According to the timing diagram of 43T panel, the data is launched
at negative edge of pixel clock and captured at positive edge.
Thus need to set pixelclk-active to 0.

Signed-off-by: default avatarRobby Cai <r63905@freescale.com>
parent e351f797
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