Commit 76440ecb authored by Andre Przywara's avatar Andre Przywara Committed by Sami Tolvanen
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UPSTREAM: arm64: include alternative handling in dcache_by_line_op



The newly introduced dcache_by_line_op macro is used at least in
one occassion at the moment to issue a "dc cvau" instruction,
which is affected by ARM errata 819472, 826319, 827319 and 824069.
Change the macro to allow for alternative patching in there to
protect affected Cortex-A53 cores.

Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
[catalin.marinas@arm.com: indentation fixups]
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>

Change-Id: I450594dc311b09b6b832b707a9abb357608cc6e4
(cherry picked from commit 823066d9)
Signed-off-by: default avatarSami Tolvanen <samitolvanen@google.com>
parent 405893f7
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