ARM: vmlinux.lds.S: do not hardcode cacheline size as 32 bytes

The linker script assumes a cacheline size of 32 bytes when aligning
the .data..cacheline_aligned and .data..percpu sections.

This patch updates the script to use L1_CACHE_BYTES, which should be set
to 64 on platforms that require it.

Change-Id: I6f760c6945138ab8872df2e15c295847077547c8
Signed-off-by: Will Deacon <will.deacon@arm.com>
[stepanm@codeaurora.org: resolved merge conflict]
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>