Commit 6e727d23 authored by Sameer Thalappil's avatar Sameer Thalappil
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wcnss: delay Riva PIL operation during SSR 



Riva SSR may initiated when the APPS CPU is in 'suspend power
collapse', so delay PIL operations in SSR. Otherwise accessing
PIL images might fail.

Change-Id: Id00c21574fb9f20bf4c4e0071e40ac0e420bf44f
Signed-off-by: default avatarSameer Thalappil <sameert@codeaurora.org>
parent 6cf8a749
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