msm: timer: Loop on clear status bit after clearing timer

Without looping on the status bit, there is no way to guarantee that a
clear of a timer has actually gone through. This can cause us to read
stale, uncleared count values, and set incorrect match values based on
them.

Additionally, remove an extraneous write to the count register, and make
the write to the clear register consistently a 0 across all cores.

CRs-Fixed: 337526
Change-Id: I84510fe9b4e9ae7648440dd3d6add17befc5a86b
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>