Need gate the QSPI2 and GPMI_IO clock during clock init

QSPI2/GPMI_IO share the same clock source but with the
different gate, need explicitely gate the QSPI2 & GPMI_IO
during the clock init phase according to the SOC design.

The topo of the clock for the GPMI_IO and NAND as below:

mux --> pre divider --> post divider --gate-- >GPMI_IO
                                     |-gate-- >QSPI2

(Note: i.MX6SX:GPMI_NAND and GSPI2 is PINMUX conflicts.)

The SOC design spec required that if change the parent clock
of the GPMI_IO or QSPI2, need gate the GPMI_IO and QSPI2 first
otherwise, there will have some glitch which cause the divider
malfunciton. Thus, we need explicitely gate QSPI2 & GPMI_IO at
the clock initialization phase and then later on common clock
framework will gurantee that each time, the parent clock rate
changes after the child clock is disabled(gated).

Signed-off-by: Jason Liu <r64343@freescale.com>
(cherry picked from commit 110d63a5886e065e77a69f816216af044c096a44)

Conflicts:
	arch/arm/mach-imx/clk-imx6sx.c