MLK-11698 ARM: imx: correct stop_mode_config bit offset

STOP_MODE_CONFIG field of PMU_MISC0 register are different
on different i.MX6 SoC, weak2P5 can only be enabled when
STOP_MODE_CONFIG is clear, need to read STOP_MODE_CONFIG
setting before enabling weak2P5, so the register field
must be correct, the definition are as below:

i.MX6Q/DL: bit[12];
i.MX6SL: bit[12:11], but only bit[11] is valid, so use bit[11];
i.MX6SX/UL: bit[11:10].

Signed-off-by: Anson Huang <b20788@freescale.com>