Commit 531659cd authored by Scott McCoy's avatar Scott McCoy Committed by Michal Simek
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SPI: zynq-qspi: Update config register value in init_hw in spi-zynq-qspi.c 



The 2-bit qspi.Config_reg[FIFO_WIDTH] register field must always
be 2'b11 (Xilinx UG585 v1.6 p1437).

Signed-off-by: default avatarScott McCoy <smccoy@hp.com>
Reviewed-by: default avatarHarini Katakam <harinik@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 8eece665
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