MLK-11401-1 ARM: imx: correct mipi PGC power up/down flow

For SW power up/down mipi phy in GPC, below flow should
be executed:

1. map mipi phy to A7 domain;
2. enable mipi phy PGC bit if it is a disable operation;
3. do software power up/down request in GPC;
4. wait for the software request bit clear.

Previous flow is incorrect, as it miss #4 step, correct it.

Signed-off-by: Anson Huang <b20788@freescale.com>