MLK-10005 PCI: imx6:enable pcie ep rc validation system

hw setup:
* two imx6q sd (imx6sx sdb) boards, one is used as pcie rc,
the other is used as pcie ep. Connected by fsl pcie adap
adaptors.

sw setup:
* when build rc image, make sure that
  CONFIG_IMX_PCIE=y
  # CONFIG_EP_MODE_IN_EP_RC_SYS is not set
  CONFIG_RC_MODE_IN_EP_RC_SYS=y
* when build ep image
  CONFIG_EP_MODE_IN_EP_RC_SYS=y
  # CONFIG_RC_MODE_IN_EP_RC_SYS is not set

features:
* set-up link between rc and ep by their stand-alone
ref clk running internally.

* in ep's system, ep can access the reserved ddr memory
(default address:0x4000_0000 on imx6q sd board, and
0xb000_0000 on imx6sx sdb board) of pcie rc's system, by the
interconnection between pcie ep and pcie rc.

* add the configuration methods in the ep side, used to
configure the start address and the size of the reserved
rc's memory window.
  - cat /sys/devices/soc0/soc.1/1ffc000.pcie/rc_memw_info
  - echo 0x41000000 > /sys/devices/soc0/soc.1/1ffc000.pcie/rc_memw_start_set
  - echo 0x800000 > /sys/devices/soc0/soc.1/1ffc000.pcie/rc_memw_size_set

* provide one example, howto configure the bar# and so on,
when pcie ep emaluates one memory ram ep device

* setup one new outbound memory region at rc side, used
to let imx6 pcie rc can access the memory of imx6 pcie ep
in imx6 pcie rc ep validation system.
  - set the default address of the ddr memory to be 0x4000_0000
  on imx6q sd board, and 0xb000_0000 on imx6sx sdb board.

NOTE:
* boot up ep platform firstly, then boot up rc platform.
* make sure that mem=768M is contained in the kernel command line,
since the start address of the upper 256mb of the 1g ddr mem is
reserved to do the pcie ep rc access operations in default.

Signed-off-by: Richard Zhu <richard.zhu@freescale.com>