From a57d3597dd8c1dd7a21af62a929d54002ba7f920 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Fri, 14 Jun 2013 14:21:32 -0400 Subject: [PATCH 001/139] various stupid compile errors --- Makefile | 3 ++- drivers/ata/libata-core.c | 2 +- drivers/media/common/tuners/xc4000.c | 2 +- fs/cifs/transport.c | 2 +- net/netfilter/xt_socket.c | 12 ++++++------ 5 files changed, 11 insertions(+), 10 deletions(-) diff --git a/Makefile b/Makefile index 75b36ae3c7d4..46feb4f57e1c 100644 --- a/Makefile +++ b/Makefile @@ -347,7 +347,8 @@ CHECK = sparse # Use the wrapper for the compiler. This wrapper scans for new # warnings and causes the build to stop upon encountering them. -CC = $(srctree)/scripts/gcc-wrapper.py $(REAL_CC) +#CC = $(srctree)/scripts/gcc-wrapper.py $(REAL_CC) +CC = $(REAL_CC) CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \ -Wbitwise -Wno-return-void $(CF) diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 23763a1ec570..d4fc4772ad19 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -1321,7 +1321,7 @@ static int ata_hpa_resize(struct ata_device *dev) int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; bool unlock_hpa = ata_ignore_hpa || dev->flags & ATA_DFLAG_UNLOCK_HPA; u64 sectors = ata_id_n_sectors(dev->id); - u64 native_sectors; + u64 native_sectors = 0; int rc; /* do we need to do it? */ diff --git a/drivers/media/common/tuners/xc4000.c b/drivers/media/common/tuners/xc4000.c index 68397110b7d9..6d157c34a64c 100644 --- a/drivers/media/common/tuners/xc4000.c +++ b/drivers/media/common/tuners/xc4000.c @@ -935,7 +935,7 @@ static int check_firmware(struct dvb_frontend *fe, unsigned int type, int rc = 0, is_retry = 0; u16 hwmodel; v4l2_std_id std0; - u8 hw_major, hw_minor, fw_major, fw_minor; + u8 hw_major = 0, hw_minor = 0, fw_major = 0, fw_minor = 0; dprintk(1, "%s called\n", __func__); diff --git a/fs/cifs/transport.c b/fs/cifs/transport.c index 0961336513d5..1607615186c9 100644 --- a/fs/cifs/transport.c +++ b/fs/cifs/transport.c @@ -569,7 +569,7 @@ SendReceive2(const unsigned int xid, struct cifs_ses *ses, { int rc = 0; int long_op; - struct mid_q_entry *midQ; + struct mid_q_entry *midQ = NULL; char *buf = iov[0].iov_base; long_op = flags & CIFS_TIMEOUT_MASK; diff --git a/net/netfilter/xt_socket.c b/net/netfilter/xt_socket.c index 1e48fcf29203..772c2bed03a6 100644 --- a/net/netfilter/xt_socket.c +++ b/net/netfilter/xt_socket.c @@ -108,9 +108,9 @@ xt_socket_get4_sk(const struct sk_buff *skb, struct xt_action_param *par) const struct iphdr *iph = ip_hdr(skb); struct udphdr _hdr, *hp = NULL; struct sock *sk; - __be32 daddr, saddr; - __be16 dport, sport; - u8 protocol; + __be32 daddr = 0, saddr = 0; + __be16 dport = 0, sport = 0; + u8 protocol = 0; #ifdef XT_SOCKET_HAVE_CONNTRACK struct nf_conn const *ct; enum ip_conntrack_info ctinfo; @@ -273,9 +273,9 @@ xt_socket_get6_sk(const struct sk_buff *skb, struct xt_action_param *par) struct ipv6hdr *iph = ipv6_hdr(skb); struct udphdr _hdr, *hp = NULL; struct sock *sk; - struct in6_addr *daddr, *saddr; - __be16 dport, sport; - int thoff, tproto; + struct in6_addr *daddr = NULL, *saddr = NULL; + __be16 dport = 0, sport = 0; + int thoff, tproto = 0; tproto = ipv6_find_hdr(skb, &thoff, -1, NULL); if (tproto < 0) { -- GitLab From 71af45c0ad8b96ba5d53ff730a67391214ecb479 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Sat, 15 Jun 2013 09:16:36 -0400 Subject: [PATCH 002/139] add ifc6410_rob_defconfig --- arch/arm/configs/ifc6410_rob_defconfig | 4050 ++++++++++++++++++++++++ 1 file changed, 4050 insertions(+) create mode 100644 arch/arm/configs/ifc6410_rob_defconfig diff --git a/arch/arm/configs/ifc6410_rob_defconfig b/arch/arm/configs/ifc6410_rob_defconfig new file mode 100644 index 000000000000..669f7d91032e --- /dev/null +++ b/arch/arm/configs/ifc6410_rob_defconfig @@ -0,0 +1,4050 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm 3.4.0 Kernel Configuration +# +CONFIG_ARM=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +# CONFIG_ARCH_USES_GETTIMEOFFSET is not set +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_KTIME_SCALAR=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_ARM_TICKET_LOCKS=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_VECTORS_BASE=0xffff0000 +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_NEED_MACH_IO_H=y +CONFIG_NEED_MACH_MEMORY_H=y +CONFIG_PHYS_OFFSET=0x80200000 +CONFIG_GENERIC_BUG=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_HAVE_IRQ_WORK=y +CONFIG_IRQ_WORK=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_FHANDLE=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_WATCH=y +CONFIG_AUDIT_TREE=y +# CONFIG_AUDIT_LOGINUID_IMMUTABLE is not set +CONFIG_HAVE_GENERIC_HARDIRQS=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_IRQ_DOMAIN=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set + +# +# RCU Subsystem +# +CONFIG_TREE_PREEMPT_RCU=y +CONFIG_PREEMPT_RCU=y +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_RCU_FAST_NO_HZ is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_BOOST is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=21 +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +# CONFIG_CPUSETS is not set +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +# CONFIG_CGROUP_MEM_RES_CTLR is not set +# CONFIG_CGROUP_PERF is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +CONFIG_RT_GROUP_SCHED=y +# CONFIG_BLK_CGROUP is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +# CONFIG_USER_NS is not set +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_EXPERT=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_ASHMEM=y +CONFIG_AIO=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_PERF_COUNTERS is not set +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +CONFIG_KPROBES=y +# CONFIG_JUMP_LABEL is not set +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_USE_GENERIC_SMP_HELPERS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BRKPT_RESERVED_RW_ACCESS=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_STOP_MACHINE=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_TEST=m +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +CONFIG_UNINLINE_SPIN_UNLOCK=y +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_BCMRING is not set +# CONFIG_ARCH_HIGHBANK is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CNS3XXX is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_PRIMA2 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_MXS is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LPC32XX is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_PICOXCELL is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +CONFIG_ARCH_MSM=y +# CONFIG_ARCH_SHMOBILE is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C24XX is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P64X0 is not set +# CONFIG_ARCH_S5PC100 is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_U8500 is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_PLAT_SPEAR is not set +# CONFIG_ARCH_VT8500 is not set +# CONFIG_ARCH_ZYNQ is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_KEYBOARD_GPIO_POLLED is not set + +# +# MSM SoC Type +# +# CONFIG_ARCH_MSM7X01A is not set +# CONFIG_ARCH_MSM7X25 is not set +# CONFIG_ARCH_MSM7X27 is not set +# CONFIG_ARCH_MSM7X30 is not set +# CONFIG_ARCH_QSD8X50 is not set +# CONFIG_ARCH_MSM8X60 is not set +CONFIG_ARCH_MSM8960=y +CONFIG_ARCH_MSM8930=y +CONFIG_ARCH_APQ8064=y +# CONFIG_ARCH_MSM8974 is not set +# CONFIG_ARCH_MPQ8092 is not set +# CONFIG_ARCH_MSM8226 is not set +# CONFIG_ARCH_FSM9XXX is not set +# CONFIG_ARCH_MSM9615 is not set +# CONFIG_ARCH_MSM8625 is not set +# CONFIG_ARCH_MSM9625 is not set +CONFIG_MSM_SOC_REV_NONE=y +# CONFIG_MSM_SOC_REV_A is not set +CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y +CONFIG_ARCH_MSM_KRAIT=y +CONFIG_MSM_SMP=y +CONFIG_ARCH_MSM_KRAITMP=y +CONFIG_MSM_KRAIT_WFE_FIXUP=y +CONFIG_MSM_RPM=y +# CONFIG_MSM_RPM_SMD is not set +CONFIG_MSM_MPM=y +CONFIG_MSM_XO=y +CONFIG_MSM_REMOTE_SPINLOCK_SFPB=y + +# +# MSM Board Selection +# +CONFIG_MACH_MSM8960_CDP=y +CONFIG_MACH_MSM8960_MTP=y +CONFIG_MACH_MSM8960_FLUID=y +CONFIG_MACH_MSM8960_LIQUID=y +CONFIG_MACH_MSM8930_CDP=y +CONFIG_MACH_MSM8930_MTP=y +CONFIG_MACH_MSM8930_FLUID=y +CONFIG_MACH_MSM8627_CDP=y +CONFIG_MACH_MSM8627_MTP=y +CONFIG_MACH_APQ8064_CDP=y +CONFIG_MACH_APQ8064_IFC6410=y +CONFIG_MACH_APQ8064_MTP=y +CONFIG_MACH_APQ8064_LIQUID=y +CONFIG_MACH_MPQ8064_CDP=y +CONFIG_MACH_MPQ8064_HRD=y +CONFIG_MACH_MPQ8064_DTV=y +# CONFIG_MSM_STACKED_MEMORY is not set +CONFIG_KERNEL_MSM_CONTIG_MEM_REGION=y +CONFIG_MSM_AMSS_VERSION=6225 +# CONFIG_MSM_AMSS_VERSION_6210 is not set +# CONFIG_MSM_AMSS_VERSION_6220 is not set +CONFIG_MSM_AMSS_VERSION_6225=y +CONFIG_MSM7X00A_USE_GP_TIMER=y +# CONFIG_MSM7X00A_USE_DG_TIMER is not set +CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y +# CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set +# CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set +# CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set +# CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set +CONFIG_MSM7X00A_SLEEP_MODE=0 +# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_POWER_COLLAPSE_SUSPEND is not set +CONFIG_MSM7X00A_IDLE_SLEEP_MODE_POWER_COLLAPSE=y +# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_APPS_SLEEP is not set +# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set +# CONFIG_MSM7X00A_IDLE_SLEEP_WAIT_FOR_INTERRUPT is not set +CONFIG_MSM7X00A_IDLE_SLEEP_MODE=1 +CONFIG_MSM7X00A_IDLE_SLEEP_MIN_TIME=20000000 +CONFIG_MSM7X00A_IDLE_SPIN_TIME=80000 +CONFIG_MSM_IDLE_STATS=y +CONFIG_MSM_IDLE_STATS_FIRST_BUCKET=62500 +CONFIG_MSM_IDLE_STATS_BUCKET_SHIFT=2 +CONFIG_MSM_IDLE_STATS_BUCKET_COUNT=10 +CONFIG_MSM_SUSPEND_STATS_FIRST_BUCKET=1000000000 +CONFIG_CPU_HAS_L2_PMU=y +# CONFIG_HTC_HEADSET is not set +# CONFIG_HTC_PWRSINK is not set +# CONFIG_MSM_FIQ_SUPPORT is not set +# CONFIG_MSM_SERIAL_DEBUGGER is not set +# CONFIG_MSM_PROC_COMM is not set +CONFIG_MSM_SMD=y +# CONFIG_MSM_SMD_PKG3 is not set +CONFIG_MSM_SMD_PKG4=y +CONFIG_MSM_PCIE=y +CONFIG_MSM_SMD_DEBUG=y +CONFIG_MSM_BAM_DMUX=y +CONFIG_MSM_N_WAY_SMD=y +CONFIG_MSM_N_WAY_SMSM=y +CONFIG_MSM_RESET_MODEM=m +CONFIG_MSM_SMD_LOGGING=y +CONFIG_MSM_IPC_LOGGING=y +CONFIG_MSM_SMD_NMEA=y +CONFIG_MSM_SMD_TTY=y +CONFIG_MSM_SMD_QMI=y +CONFIG_MSM_SMD_PKT=y +CONFIG_MSM_DSPS=y +# CONFIG_MSM_ONCRPCROUTER is not set +CONFIG_MSM_IPC_ROUTER=y +CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y +# CONFIG_MSM_DALRPC is not set +# CONFIG_MSM_CPU_FREQ_SET_MIN_MAX is not set +CONFIG_MSM_AVS_HW=y +# CONFIG_MSM_HW3D is not set +CONFIG_AMSS_7X25_VERSION_2009=y +# CONFIG_AMSS_7X25_VERSION_2008 is not set +CONFIG_RTAC=y +# CONFIG_MSM_VREG_SWITCH_INVERTED is not set +CONFIG_MSM_DMA_TEST=m +# CONFIG_WIFI_CONTROL_FUNC is not set +CONFIG_MSM_SLEEP_TIME_OVERRIDE=y +# CONFIG_MSM_MEMORY_LOW_POWER_MODE is not set +CONFIG_MSM_PM_TIMEOUT_HALT=y +# CONFIG_MSM_PM_TIMEOUT_RESET_MODEM is not set +# CONFIG_MSM_PM_TIMEOUT_RESET_CHIP is not set +CONFIG_MSM_IDLE_WAIT_ON_MODEM=0 +CONFIG_MSM_RPM_REGULATOR=y +CONFIG_MSM_SUBSYSTEM_RESTART=y +CONFIG_MSM_SYSMON_COMM=y +CONFIG_MSM_PIL=y +# CONFIG_MSM_PIL_MODEM is not set +# CONFIG_MSM_PIL_QDSP6V3 is not set +CONFIG_MSM_PIL_QDSP6V4=y +# CONFIG_MSM_PIL_LPASS_QDSP6V5 is not set +# CONFIG_MSM_PIL_MSS_QDSP6V5 is not set +CONFIG_MSM_PIL_RIVA=y +CONFIG_MSM_PIL_TZAPPS=y +CONFIG_MSM_PIL_DSPS=y +CONFIG_MSM_PIL_VIDC=y +# CONFIG_MSM_PIL_VENUS is not set +CONFIG_MSM_PIL_GSS=y +# CONFIG_MSM_PIL_PRONTO is not set +CONFIG_MSM_SCM=y +CONFIG_MSM_MODEM_8960=y +CONFIG_MSM_LPASS_8960=y +CONFIG_MSM_WCNSS_SSR_8960=y +CONFIG_MSM_GSS_SSR_8064=y +CONFIG_MSM_BUSPM_DEV=m +CONFIG_MSM_TZ_LOG=y +CONFIG_MSM_RPM_LOG=y +CONFIG_MSM_RPM_STATS_LOG=y +CONFIG_MSM_RPM_RBCPR_STATS_LOG=y +CONFIG_MSM_DIRECT_SCLK_ACCESS=y +CONFIG_IOMMU_API=y +CONFIG_MSM_GPIOMUX=y +CONFIG_MSM_NATIVE_RESTART=y +CONFIG_MSM_PM8X60=y +CONFIG_MSM_EVENT_TIMER=y +CONFIG_MSM_BUS_SCALING=y +CONFIG_MSM_BUS_RPM_MULTI_TIER_ENABLED=y +CONFIG_MSM_WATCHDOG=y +# CONFIG_MSM_WATCHDOG_V2 is not set +# CONFIG_MSM_MEMORY_DUMP is not set +CONFIG_MSM_DLOAD_MODE=y +CONFIG_MSM_JTAG=y +# CONFIG_MSM_SLEEP_STATS_DEVICE is not set +CONFIG_MSM_RUN_QUEUE_STATS=y +# CONFIG_MSM_STANDALONE_POWER_COLLAPSE is not set +# CONFIG_MSM_GSBI9_UART is not set +CONFIG_MSM_SHOW_RESUME_IRQ=y +# CONFIG_MSM_FAKE_BATTERY is not set +CONFIG_MSM_QDSP6_APR=y +# CONFIG_MSM_QDSP6_APRV2 is not set +CONFIG_MSM_QDSP6_CODECS=y +# CONFIG_MSM_QDSP6V2_CODECS is not set +CONFIG_MSM_AUDIO_QDSP6=y +# CONFIG_MSM_AUDIO_QDSP6V2 is not set +CONFIG_MSM_ULTRASOUND=y +# CONFIG_MSM_SPM_V1 is not set +CONFIG_MSM_SPM_V2=y +CONFIG_MSM_L2_SPM=y +CONFIG_MSM_MULTIMEDIA_USE_ION=y +# CONFIG_MSM_OCMEM is not set +CONFIG_MSM_RTB=y +CONFIG_MSM_RTB_SEPARATE_CPUS=y +CONFIG_MSM_EBI_ERP=y +CONFIG_MSM_CACHE_ERP=y +CONFIG_MSM_L1_ERR_PANIC=y +CONFIG_MSM_L1_ERR_LOG=y +CONFIG_MSM_L2_ERP_PRINT_ACCESS_ERRORS=y +# CONFIG_MSM_L2_ERP_PORT_PANIC is not set +CONFIG_MSM_L2_ERP_1BIT_PANIC=y +CONFIG_MSM_L2_ERP_2BIT_PANIC=y +CONFIG_MSM_DCVS=y +# CONFIG_MSM_CPR is not set +CONFIG_HAVE_ARCH_HAS_CURRENT_TIMER=y +CONFIG_MSM_CACHE_DUMP=y +CONFIG_MSM_CACHE_DUMP_ON_PANIC=y +CONFIG_MSM_HSIC_SYSMON=y +# CONFIG_MSM_HSIC_SYSMON_TEST is not set + +# +# System MMU +# + +# +# Processor Type +# +CONFIG_CPU_V7=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_LPAE is not set +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +CONFIG_SWP_EMULATE=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +# CONFIG_CACHE_L2X0 is not set +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +# CONFIG_VCM is not set +CONFIG_STRICT_MEMORY_RWX=y +CONFIG_ARM_NR_BANKS=8 +# CONFIG_RESERVE_FIRST_PAGE is not set +CONFIG_CPU_HAS_PMU=y +CONFIG_MULTI_IRQ_HANDLER=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_458693 is not set +# CONFIG_ARM_ERRATA_460075 is not set +# CONFIG_ARM_ERRATA_742230 is not set +# CONFIG_ARM_ERRATA_742231 is not set +# CONFIG_ARM_ERRATA_720789 is not set +# CONFIG_ARM_ERRATA_743622 is not set +# CONFIG_ARM_ERRATA_751472 is not set +# CONFIG_ARM_ERRATA_754322 is not set +# CONFIG_ARM_ERRATA_754327 is not set +# CONFIG_ARM_ERRATA_764369 is not set +# CONFIG_KSAPI is not set +CONFIG_ARM_GIC=y +# CONFIG_FIQ_DEBUGGER is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_SYSCALL=y +CONFIG_ARCH_SUPPORTS_MSI=y +CONFIG_PCI_MSI=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_HAVE_SMP=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_ARM_CPU_TOPOLOGY=y +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_SMT is not set +CONFIG_HAVE_ARM_SCU=y +# CONFIG_ARM_ARCH_TIMER is not set +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_NR_CPUS=4 +CONFIG_HOTPLUG_CPU=y +CONFIG_LOCAL_TIMERS=y +CONFIG_ARCH_NR_GPIO=0 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_HZ=100 +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_HW_PERF_EVENTS=y +CONFIG_VMALLOC_RESERVE=0x19000000 +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 +# CONFIG_COMPACTION is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_CLEANCACHE=y +# CONFIG_ARCH_MEMORY_PROBE is not set +# CONFIG_ARCH_MEMORY_REMOVE is not set +# CONFIG_ENABLE_DMM is not set +# CONFIG_FIX_MOVABLE_ZONE is not set +CONFIG_DONT_MAP_HOLE_AFTER_MEMBANK0=y +# CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG is not set +# CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE is not set +CONFIG_HOLES_IN_ZONE=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set +# CONFIG_SECCOMP is not set +CONFIG_CC_STACKPROTECTOR=y +# CONFIG_DEPRECATED_PARAM_STRUCT is not set +# CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART is not set +CONFIG_CP_ACCESS=y + +# +# Boot options +# +# CONFIG_USE_OF is not set +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_AUTO_ZRELADDR is not set + +# +# CPU Power Management +# + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set + +# +# ARM CPU frequency scaling drivers +# +# CONFIG_ARM_EXYNOS4210_CPUFREQ is not set +# CONFIG_ARM_EXYNOS4X12_CPUFREQ is not set +# CONFIG_ARM_EXYNOS5250_CPUFREQ is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_FREQ_MSM=y + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HAS_WAKELOCK=y +CONFIG_HAS_EARLYSUSPEND=y +CONFIG_WAKELOCK=y +CONFIG_WAKELOCK_STAT=y +CONFIG_USER_WAKELOCK=y +CONFIG_EARLYSUSPEND=y +# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set +# CONFIG_CONSOLE_EARLYSUSPEND is not set +CONFIG_FB_EARLYSUSPEND=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_RUNTIME=y +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +# CONFIG_APM_EMULATION is not set +CONFIG_PM_CLK=y +CONFIG_CPU_PM=y +# CONFIG_SUSPEND_TIME is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +CONFIG_IP_MULTIPLE_TABLES=y +# CONFIG_IP_ROUTE_MULTIPATH is not set +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_INET6_XFRM_TUNNEL=y +CONFIG_INET6_TUNNEL=y +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=y +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +# CONFIG_IPV6_MROUTE is not set +# CONFIG_ANDROID_PARANOID_NETWORK is not set +CONFIG_NET_ACTIVITY_STATS=y +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +CONFIG_NETFILTER_NETLINK_QUEUE=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_GRE=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_BROADCAST=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +# CONFIG_NF_CONNTRACK_SNMP is not set +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=y +CONFIG_NETFILTER_XT_CONNMARK=y + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +# CONFIG_NETFILTER_XT_TARGET_CT is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +CONFIG_NETFILTER_XT_MATCH_ECN=y +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_HL=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +# CONFIG_IP_NF_QUEUE is not set +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +# CONFIG_IP_NF_MATCH_RPFILTER is not set +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +# CONFIG_IP_NF_TARGET_REJECT_SKERR is not set +# CONFIG_IP_NF_TARGET_ULOG is not set +CONFIG_NF_NAT=y +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_NF_NAT_PROTO_DCCP=y +CONFIG_NF_NAT_PROTO_GRE=y +CONFIG_NF_NAT_PROTO_UDPLITE=y +CONFIG_NF_NAT_PROTO_SCTP=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_IRC=y +CONFIG_NF_NAT_TFTP=y +CONFIG_NF_NAT_AMANDA=y +CONFIG_NF_NAT_PPTP=y +CONFIG_NF_NAT_H323=y +CONFIG_NF_NAT_SIP=y +CONFIG_IP_NF_MANGLE=y +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV6=y +CONFIG_NF_CONNTRACK_IPV6=y +# CONFIG_IP6_NF_QUEUE is not set +CONFIG_IP6_NF_IPTABLES=y +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +# CONFIG_IP6_NF_TARGET_REJECT_SKERR is not set +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +CONFIG_NET_SCH_HTB=y +# CONFIG_NET_SCH_HFSC is not set +CONFIG_NET_SCH_PRIO=y +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set +# CONFIG_NET_SCH_MQPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +# CONFIG_NET_SCH_INGRESS is not set +# CONFIG_NET_SCH_PLUG is not set + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +# CONFIG_CLS_U32_PERF is not set +CONFIG_CLS_U32_MARK=y +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +CONFIG_NET_CLS_FLOW=y +# CONFIG_NET_CLS_CGROUP is not set +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +# CONFIG_NET_ACT_POLICE is not set +# CONFIG_NET_ACT_GACT is not set +# CONFIG_NET_ACT_MIRRED is not set +# CONFIG_NET_ACT_IPT is not set +# CONFIG_NET_ACT_NAT is not set +# CONFIG_NET_ACT_PEDIT is not set +# CONFIG_NET_ACT_SIMP is not set +# CONFIG_NET_ACT_SKBEDIT is not set +# CONFIG_NET_ACT_CSUM is not set +# CONFIG_NET_CLS_IND is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_NETPRIO_CGROUP is not set +CONFIG_BQL=y +CONFIG_HAVE_BPF_JIT=y +# CONFIG_BPF_JIT is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_TCPPROBE is not set +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +CONFIG_BT_HCISMD=y +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +CONFIG_BT_HCIUART_ATH3K=y +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIUART_IBS=y +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_MSM_SLEEP is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +CONFIG_MSM_BT_POWER=y +# CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +# CONFIG_CFG80211_WEXT is not set +# CONFIG_WIRELESS_EXT_SYSFS is not set +# CONFIG_LIB80211 is not set +# CONFIG_CFG80211_ALLOW_RECONNECT is not set +# CONFIG_MAC80211 is not set +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_PM=y +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_REGULATOR is not set +# CONFIG_RFKILL_GPIO is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_GENLOCK=y +CONFIG_GENLOCK_MISCDEVICE=y +# CONFIG_SYNC is not set +# CONFIG_CMA is not set +# CONFIG_CONNECTOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +# CONFIG_BLK_DEV_RBD is not set + +# +# Misc devices +# +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +CONFIG_ANDROID_PMEM=y +# CONFIG_ATMEL_PWM is not set +# CONFIG_PHANTOM is not set +# CONFIG_INTEL_MID_PTI is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_SENSORS_AK8975 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_UID_STAT is not set +# CONFIG_BMP085 is not set +# CONFIG_PCH_PHUB is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_WL127X_RFKILL is not set +# CONFIG_APANIC is not set +# CONFIG_TSIF is not set +# CONFIG_TSPP is not set +CONFIG_HAPTIC_ISA1200=y +CONFIG_PMIC8XXX_VIBRATOR=y +# CONFIG_PMIC8XXX_NFC is not set +# CONFIG_PMIC8XXX_UPL is not set +CONFIG_QSEECOM=y +# CONFIG_QFP_FUSE is not set +CONFIG_USB_HSIC_SMSC_HUB=y +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +CONFIG_EEPROM_93CX6=y +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_CB710_CORE is not set +# CONFIG_IWMC3200TOP is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_TGT=y +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_SCSI_BNX2X_FCOE is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_FCOE is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +# CONFIG_SATA_AHCI is not set +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_SATA_AHCI_MSM=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CS5536 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_DM=y +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=y +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=y +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +CONFIG_MII=y +# CONFIG_IFB is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_TUN=y +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# +CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +CONFIG_ATL1C=y +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2X is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +# CONFIG_NET_CALXEDA_XGMAC is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CIRRUS=y +# CONFIG_CS89x0 is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +# CONFIG_DM9000 is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EXAR=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_FARADAY=y +# CONFIG_FTMAC100 is not set +# CONFIG_FTGMAC100 is not set +CONFIG_NET_VENDOR_HP=y +# CONFIG_HP100 is not set +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +CONFIG_NET_VENDOR_I825XX=y +# CONFIG_IP1000 is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +CONFIG_NET_VENDOR_MELLANOX=y +# CONFIG_MLX4_EN is not set +# CONFIG_MLX4_CORE is not set +CONFIG_NET_VENDOR_MICREL=y +CONFIG_KS8851=y +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_MSM_RMNET is not set +CONFIG_MSM_RMNET_BAM=y +CONFIG_MSM_RMNET_SMUX=y +# CONFIG_QFEC is not set +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_AX88796 is not set +# CONFIG_NE2K_PCI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_PCH_GBE is not set +# CONFIG_ETHOC is not set +CONFIG_NET_PACKET_ENGINE=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_QLGE is not set +# CONFIG_NETXEN_NIC is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_SEEQ=y +# CONFIG_SEEQ8005 is not set +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +# CONFIG_SFC is not set +CONFIG_NET_VENDOR_SMSC=y +CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set +CONFIG_SMC911X=y +CONFIG_SMSC911X=y +# CONFIG_SMSC911X_ARCH_HOOKS is not set +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_STMICRO=y +# CONFIG_STMMAC_ETH is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +CONFIG_SLIP=y +CONFIG_SLHC=y +CONFIG_SLIP_COMPRESSED=y +# CONFIG_SLIP_SMART is not set +CONFIG_SLIP_MODE_SLIP6=y +# CONFIG_TR is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=y +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET=y +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=y +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +CONFIG_MSM_RMNET_USB=y +CONFIG_WLAN=y +# CONFIG_ATMEL is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_LIBRA_SDIOIF is not set +# CONFIG_ATH6K_LEGACY_EXT is not set +CONFIG_WCNSS_CORE=y +# CONFIG_WCNSS_CORE_PRONTO is not set +CONFIG_WCNSS_MEM_PRE_ALLOC=y +# CONFIG_ATH_COMMON is not set +# CONFIG_BCMDHD is not set +# CONFIG_BRCMFMAC is not set +# CONFIG_HOSTAP is not set +# CONFIG_IPW2100 is not set +# CONFIG_IWM is not set +# CONFIG_LIBERTAS is not set +# CONFIG_MWIFIEX is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m +# CONFIG_INPUT_KEYRESET is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +CONFIG_KEYBOARD_MATRIX=y +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +CONFIG_KEYBOARD_PMIC8XXX=y +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_QCIKBD is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_QCITP is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set +# CONFIG_JOYSTICK_IFORCE is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_AS5011 is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +CONFIG_JOYSTICK_XPAD=y +# CONFIG_JOYSTICK_XPAD_FF is not set +# CONFIG_JOYSTICK_XPAD_LEDS is not set +# CONFIG_TOUCHDISC_VTD518_SHINETSU is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_ATMEL_MAXTOUCH is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=y +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_MSM_LEGACY is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_CY8C_TS is not set +CONFIG_TOUCHSCREEN_CYTTSP_I2C_QC=y +# CONFIG_TOUCHSCREEN_FT5X06 is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_PM8XXX_VIBRATOR is not set +CONFIG_INPUT_PMIC8XXX_PWRKEY=y +# CONFIG_INPUT_MMA8450 is not set +CONFIG_INPUT_MPU3050=y +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYCHORD is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_GPIO is not set +# CONFIG_INPUT_ISA1200_FF_MEMLESS is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_BOSCH_BMA150 is not set +CONFIG_STM_LIS3DH=y + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +CONFIG_N_SMUX=y +CONFIG_N_SMUX_LOOPBACK=y +CONFIG_SMUX_CTL=y +# CONFIG_TRACE_SINK is not set +CONFIG_DEVMEM=y +CONFIG_DEVKMEM=y + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX3107 is not set +# CONFIG_SERIAL_MFD_HSU is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_MSM is not set +CONFIG_SERIAL_MSM_HS=y +CONFIG_SERIAL_MSM_HSL=y +CONFIG_SERIAL_MSM_HSL_CONSOLE=y +# CONFIG_SERIAL_BCM_BT_LPM is not set +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_PCH_UART is not set +# CONFIG_SERIAL_MSM_SMD is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set + +# +# Diag Support +# +CONFIG_DIAG_CHAR=y + +# +# DIAG traffic over USB +# +CONFIG_DIAG_OVER_USB=y + +# +# SDIO support for DIAG +# + +# +# HSIC support for DIAG +# +CONFIG_DIAG_BRIDGE_CODE=y +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_MSM=y +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_DCC_TTY is not set +# CONFIG_RAMOOPS is not set +CONFIG_MSM_ROTATOR=y +# CONFIG_MMC_GENERIC_CSDIO is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EG20T is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_INTEL_MID is not set +# CONFIG_I2C_MSM is not set +CONFIG_I2C_QUP=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PXA2XX_PCI is not set +# CONFIG_SPI_TOPCLIFF_PCH is not set +# CONFIG_SPI_XILINX is not set +CONFIG_SPI_QUP=y +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=m +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPMI is not set +CONFIG_SLIMBUS=y +CONFIG_SLIMBUS_MSM_CTRL=y +# CONFIG_HSI is not set + +# +# PPS support +# +# CONFIG_PPS is not set + +# +# PPS generators support +# + +# +# PTP clock support +# + +# +# Enable Device Drivers -> PPS to see the PTP clock options. +# +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y + +# +# Memory mapped GPIO drivers: +# +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_MSM_V1 is not set +CONFIG_GPIO_MSM_V2=y +# CONFIG_GPIO_MSM_V3 is not set +# CONFIG_GPIO_FSM9XXX is not set +# CONFIG_GPIO_VX855 is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCF857X is not set +CONFIG_GPIO_SX150X=y +# CONFIG_GPIO_ADP5588 is not set + +# +# PCI GPIO expanders: +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_ML_IOH is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_74X164 is not set + +# +# AC97 GPIO expanders: +# + +# +# MODULbus GPIO expanders: +# +CONFIG_GPIO_PM8XXX=y +CONFIG_GPIO_PM8XXX_MPP=y +# CONFIG_GPIO_PM8XXX_RPC is not set +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_BATTERY_MSM is not set +# CONFIG_BATTERY_MSM8X60 is not set +CONFIG_ISL9519_CHARGER=y +# CONFIG_SMB137B_CHARGER is not set +CONFIG_SMB349_CHARGER=y +# CONFIG_BATTERY_BQ27520 is not set +# CONFIG_BATTERY_BQ27541 is not set +CONFIG_PM8921_CHARGER=y +CONFIG_PM8XXX_CCADC=y +# CONFIG_LTC4088_CHARGER is not set +CONFIG_PM8921_BMS=y +CONFIG_BATTERY_BCL=y +# CONFIG_CHARGER_SMB347 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +CONFIG_SENSORS_PM8XXX_ADC=y +CONFIG_SENSORS_EPM_ADC=y +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +# CONFIG_THERMAL_MSM_POPMEM is not set +# CONFIG_THERMAL_TSENS is not set +CONFIG_THERMAL_TSENS8960=y +# CONFIG_THERMAL_TSENS8974 is not set +CONFIG_THERMAL_PM8XXX=y +CONFIG_THERMAL_MONITOR=y +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_PMIC8058 is not set +# CONFIG_PMIC8901 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +CONFIG_MARIMBA_CORE=y +# CONFIG_MARIMBA_CODEC is not set +# CONFIG_TIMPANI_CODEC is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_S5M_CORE is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_MC13XXX is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_TIMBERDALE is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_WL1273_CORE is not set +CONFIG_MFD_PM8XXX=y +CONFIG_MFD_PM8921_CORE=y +CONFIG_MFD_PM8821_CORE=y +# CONFIG_MFD_PM8018_CORE is not set +CONFIG_MFD_PM8038_CORE=y +CONFIG_MFD_PM8XXX_IRQ=y +CONFIG_MFD_PM8821_IRQ=y +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_AAT2870_CORE is not set +CONFIG_MFD_PM8XXX_DEBUG=y +CONFIG_MFD_PM8XXX_PWM=y +CONFIG_MFD_PM8XXX_MISC=y +CONFIG_MFD_PM8XXX_SPK=y +CONFIG_MFD_PM8XXX_BATT_ALARM=y +CONFIG_WCD9304_CODEC=y +CONFIG_WCD9310_CODEC=y +# CONFIG_WCD9320_CODEC is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_DUMMY is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_GPIO is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_PM8XXX=y +CONFIG_REGULATOR_MSM_GPIO=y +# CONFIG_REGULATOR_STUB is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +CONFIG_RC_CORE=y +CONFIG_LIRC=y +CONFIG_USER_RC_INPUT=y +CONFIG_RC_MAP=y +CONFIG_IR_NEC_DECODER=y +CONFIG_IR_RC5_DECODER=y +CONFIG_IR_RC6_DECODER=y +CONFIG_IR_JVC_DECODER=y +CONFIG_IR_SONY_DECODER=y +CONFIG_IR_RC5_SZ_DECODER=y +CONFIG_IR_SANYO_DECODER=y +CONFIG_IR_MCE_KBD_DECODER=y +CONFIG_IR_LIRC_CODEC=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_RC_LOOPBACK is not set +CONFIG_IR_GPIO_CIR=y +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA827X=y +CONFIG_MEDIA_TUNER_TDA18271=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_MEDIA_TUNER_XC4000=y +CONFIG_MEDIA_TUNER_MC44S803=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_DMA_CONTIG=y +CONFIG_VIDEOBUF2_VMALLOC=y +CONFIG_VIDEOBUF2_DMA_SG=y +CONFIG_VIDEOBUF2_MSM_MEM=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_IR_I2C=y + +# +# Audio decoders, processors and mixers +# + +# +# RDS decoders +# + +# +# Video decoders +# + +# +# Video and audio decoders +# + +# +# MPEG video encoders +# + +# +# Video encoders +# + +# +# Camera sensor devices +# + +# +# Flash devices +# + +# +# Video improvement chips +# + +# +# Miscelaneous helper chips +# +# CONFIG_VIDEO_VIVI is not set +CONFIG_MSM_VCAP=y +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=y +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +CONFIG_V4L_PCI_DRIVERS=y +# CONFIG_VIDEO_BT848 is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_IVTV is not set +# CONFIG_VIDEO_MXB is not set +# CONFIG_VIDEO_SAA7134 is not set +# CONFIG_VIDEO_ZORAN is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_SOC_CAMERA is not set + +# +# Qualcomm MSM Camera And Video +# +CONFIG_MSM_CAMERA=y +# CONFIG_MSM_CAMERA_DEBUG is not set +CONFIG_MSM_CAMERA_V4L2=y + +# +# Camera Sensor Selection +# +CONFIG_IMX074=y +# CONFIG_OV5647 is not set +CONFIG_MT9M114=y +CONFIG_WEBCAM_OV9726=y +CONFIG_IMX074_ACT=y +# CONFIG_S5K4E1 is not set +CONFIG_MSM_CAMERA_FLASH_SC628A=y +# CONFIG_MSM_CAMERA_FLASH_TPS61310 is not set +# CONFIG_IMX072 is not set +CONFIG_OV2720=y +# CONFIG_OV8825 is not set +CONFIG_OV8830=y +CONFIG_MSM_CAMERA_FLASH=y +CONFIG_MSM_CAMERA_SENSOR=y +CONFIG_MSM_ACTUATOR=y +CONFIG_MSM_EEPROM=y +CONFIG_IMX074_EEPROM=y +CONFIG_IMX091_EEPROM=y +CONFIG_OV8830_EEPROM=y +CONFIG_MSM_GEMINI=y +CONFIG_MSM_MERCURY=y +# CONFIG_MSM_CAM_IRQ_ROUTER is not set +# CONFIG_MSM_CPP is not set +# CONFIG_MSM_CCI is not set +CONFIG_QUP_EXCLUSIVE_TO_CAMERA=y +CONFIG_MSM_CSI20_HEADER=y +# CONFIG_MSM_CSI30_HEADER is not set +# CONFIG_MSM_CSIPHY is not set +# CONFIG_MSM_CSID is not set +# CONFIG_MSM_CSI2_REGISTER is not set +# CONFIG_MSM_ISPIF is not set +CONFIG_S5K3L1YX=y +CONFIG_IMX091=y +# CONFIG_MSM_V4L2_VIDEO_OVERLAY_DEVICE is not set +# CONFIG_OV7692 is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_USB_DSBR is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_I2C_SI4713 is not set +# CONFIG_RADIO_SI4713 is not set +# CONFIG_USB_KEENE is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_SAA7706H is not set +# CONFIG_RADIO_TEF6862 is not set +# CONFIG_RADIO_WL1273 is not set + +# +# Texas Instruments WL128x FM driver (ST based) +# +# CONFIG_RADIO_WL128X is not set +# CONFIG_RADIO_TAVARUA is not set +CONFIG_RADIO_IRIS=y +CONFIG_RADIO_IRIS_TRANSPORT=m + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +# CONFIG_DRM_VMWGFX is not set +# CONFIG_DRM_UDL is not set +# CONFIG_STUB_POULSBO is not set +CONFIG_ION=y +CONFIG_ION_MSM=y +CONFIG_MSM_KGSL=y +# CONFIG_MSM_KGSL_CFF_DUMP is not set +# CONFIG_MSM_KGSL_PSTMRTMDMP_CP_STAT_NO_DETAIL is not set +# CONFIG_MSM_KGSL_PSTMRTMDMP_NO_IB_DUMP is not set +# CONFIG_MSM_KGSL_PSTMRTMDMP_RB_HEX is not set +CONFIG_MSM_KGSL_2D=y +CONFIG_MSM_KGSL_DRM=y +CONFIG_MSM_KGSL_PAGE_TABLE_SIZE=0xFFF0000 +CONFIG_MSM_KGSL_MMU_PAGE_FAULT=y +# CONFIG_MSM_KGSL_DISABLE_SHADOW_WRITES is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +# CONFIG_FB_WMT_GE_ROPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_TMIO is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +CONFIG_FB_VIRTUAL=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_MSM_VIDC=y +CONFIG_MSM_VIDC_1080P=y +CONFIG_MSM_VIDC_VENC=y +CONFIG_MSM_VIDC_VDEC=y +# CONFIG_MSM_VIDC_CONTENT_PROTECTION is not set +CONFIG_FB_MSM=y +# CONFIG_FB_MSM_BACKLIGHT is not set +CONFIG_FB_MSM_LOGO=y +CONFIG_FB_MSM_LCDC_HW=y +CONFIG_FB_MSM_TRIPLE_BUFFER=y +CONFIG_FB_MSM_MDP_HW=y +# CONFIG_FB_MSM_MDP22 is not set +# CONFIG_FB_MSM_MDP30 is not set +# CONFIG_FB_MSM_MDP31 is not set +CONFIG_FB_MSM_MDP40=y +# CONFIG_FB_MSM_MDSS is not set +# CONFIG_FB_MSM_MDP_NONE is not set +# CONFIG_FB_MSM_EBI2 is not set +# CONFIG_FB_MSM_MDDI is not set +CONFIG_FB_MSM_MIPI_DSI=y +# CONFIG_FB_MSM_LCDC is not set +# CONFIG_FB_MSM_LVDS is not set +CONFIG_FB_MSM_OVERLAY=y +CONFIG_FB_MSM_DTV=y +# CONFIG_FB_MSM_EXTMDDI is not set +# CONFIG_FB_MSM_TVOUT is not set +# CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON is not set +# CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON_VGA is not set +# CONFIG_FB_MSM_MDDI_ORISE is not set +# CONFIG_FB_MSM_MDDI_QUICKVX is not set +# CONFIG_FB_MSM_MDDI_AUTO_DETECT is not set +# CONFIG_FB_MSM_LCDC_AUTO_DETECT is not set +# CONFIG_FB_MSM_LCDC_PANEL is not set +# CONFIG_FB_MSM_MIPI_DSI_TOSHIBA is not set +# CONFIG_FB_MSM_MIPI_DSI_RENESAS is not set +# CONFIG_FB_MSM_MIPI_DSI_SIMULATOR is not set +# CONFIG_FB_MSM_MIPI_DSI_NOVATEK is not set +# CONFIG_FB_MSM_MIPI_DSI_ORISE is not set +CONFIG_FB_MSM_MIPI_DSI_TC358764_DSI2LVDS=y +# CONFIG_FB_MSM_LCDC_ST15_WXGA is not set +# CONFIG_FB_MSM_LCDC_ST15_PANEL is not set +# CONFIG_FB_MSM_LCDC_PRISM_WVGA is not set +# CONFIG_FB_MSM_LCDC_SAMSUNG_WSVGA is not set +# CONFIG_FB_MSM_LCDC_CHIMEI_WXGA is not set +# CONFIG_FB_MSM_LCDC_GORDON_VGA is not set +# CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT is not set +# CONFIG_FB_MSM_LCDC_TOSHIBA_FWVGA_PT is not set +# CONFIG_FB_MSM_LCDC_SHARP_WVGA_PT is not set +# CONFIG_FB_MSM_LCDC_AUO_WVGA is not set +# CONFIG_FB_MSM_LCDC_TRULY_HVGA_IPS3P2335 is not set +# CONFIG_FB_MSM_LCDC_TRULY_HVGA_IPS3P2335_PT_PANEL is not set +# CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT is not set +# CONFIG_FB_MSM_LCDC_NT35582_WVGA is not set +# CONFIG_FB_MSM_LCDC_WXGA is not set +# CONFIG_FB_MSM_LVDS_CHIMEI_WXGA is not set +# CONFIG_FB_MSM_LVDS_FRC_FHD is not set +# CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WVGA_PT is not set +# CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WSVGA_PT is not set +# CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WUXGA is not set +# CONFIG_FB_MSM_MIPI_NOVATEK_VIDEO_QHD_PT is not set +# CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT is not set +# CONFIG_FB_MSM_MIPI_ORISE_VIDEO_720P_PT is not set +# CONFIG_FB_MSM_MIPI_ORISE_CMD_720P_PT is not set +# CONFIG_FB_MSM_MIPI_RENESAS_VIDEO_FWVGA_PT is not set +# CONFIG_FB_MSM_MIPI_RENESAS_CMD_FWVGA_PT is not set +# CONFIG_FB_MSM_MIPI_NT35510_VIDEO_WVGA_PT is not set +# CONFIG_FB_MSM_MIPI_NT35510_CMD_WVGA_PT is not set +# CONFIG_FB_MSM_MIPI_NT35516_VIDEO_QHD_PT is not set +# CONFIG_FB_MSM_MIPI_NT35516_CMD_QHD_PT is not set +CONFIG_FB_MSM_MIPI_CHIMEI_WXGA=y +CONFIG_FB_MSM_MIPI_CHIMEI_WUXGA=y +# CONFIG_FB_MSM_MIPI_SIMULATOR_VIDEO is not set +CONFIG_FB_MSM_NO_MDP_PIPE_CTRL=y +CONFIG_FB_MSM_OVERLAY0_WRITEBACK=y +CONFIG_FB_MSM_OVERLAY1_WRITEBACK=y +CONFIG_FB_MSM_WRITEBACK_MSM_PANEL=y +# CONFIG_FB_MSM_LCDC_PRISM_WVGA_PANEL is not set +# CONFIG_FB_MSM_LCDC_SAMSUNG_WSVGA_PANEL is not set +# CONFIG_FB_MSM_LCDC_CHIMEI_WXGA_PANEL is not set +# CONFIG_FB_MSM_LCDC_GORDON_VGA_PANEL is not set +# CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT_PANEL is not set +# CONFIG_FB_MSM_LCDC_TOSHIBA_FWVGA_PT_PANEL is not set +# CONFIG_FB_MSM_LCDC_SHARP_WVGA_PT_PANEL is not set +# CONFIG_FB_MSM_LCDC_AUO_WVGA_PANEL is not set +# CONFIG_FB_MSM_LCDC_NT35582_PANEL is not set +# CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT_PANEL is not set +# CONFIG_FB_MSM_LVDS_CHIMEI_WXGA_PANEL is not set +# CONFIG_FB_MSM_LVDS_FRC_FHD_PANEL is not set +# CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM is not set +# CONFIG_FB_MSM_MIPI_PANEL_DETECT is not set +# CONFIG_FB_MSM_MDDI_PANEL_AUTO_DETECT is not set +# CONFIG_FB_MSM_LCDC_PANEL_AUTO_DETECT is not set +# CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT is not set +# CONFIG_FB_MSM_LVDS_MIPI_PANEL_DETECT is not set +# CONFIG_FB_MSM_MDDI_PRISM_WVGA is not set +# CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA_PORTRAIT is not set +# CONFIG_FB_MSM_MDDI_TOSHIBA_VGA is not set +# CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA is not set +# CONFIG_FB_MSM_MDDI_SHARP_QVGA_128x128 is not set +# CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WVGA_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WSVGA_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WUXGA_PANEL is not set +# CONFIG_FB_MSM_MIPI_NOVATEK_VIDEO_QHD_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_ORISE_VIDEO_720P_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_ORISE_CMD_720P_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_RENESAS_VIDEO_FWVGA_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_RENESAS_CMD_FWVGA_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_CHIMEI_WXGA_PANEL is not set +# CONFIG_FB_MSM_MIPI_CHIMEI_WUXGA_PANEL is not set +# CONFIG_FB_MSM_MIPI_TRULY_VIDEO_WVGA_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_NT35510_VIDEO_WVGA_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_NT35510_CMD_WVGA_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_NT35516_VIDEO_QHD_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_NT35516_CMD_QHD_PT_PANEL is not set +# CONFIG_FB_MSM_MIPI_SIMULATOR_VIDEO_PANEL is not set +# CONFIG_FB_MSM_EBI2_TMD_QVGA_EPSON_QCIF is not set +CONFIG_FB_MSM_HDMI_AS_PRIMARY=y +# CONFIG_FB_MSM_PANEL_NONE is not set +CONFIG_FB_MSM_EXT_INTERFACE_COMMON=y +CONFIG_FB_MSM_HDMI_COMMON=y +CONFIG_FB_MSM_HDMI_3D=y +# CONFIG_FB_MSM_HDMI_ADV7520_PANEL is not set +CONFIG_FB_MSM_HDMI_MSM_PANEL=y +CONFIG_FB_MSM_HDMI_MSM_PANEL_DVI_SUPPORT=y +# CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT is not set +# CONFIG_FB_MSM_HDMI_MHL_9244 is not set +# CONFIG_FB_MSM_HDMI_MHL_8334 is not set +# CONFIG_FB_MSM_TVOUT_NTSC_M is not set +# CONFIG_FB_MSM_TVOUT_NTSC_J is not set +# CONFIG_FB_MSM_TVOUT_PAL_BDGHIN is not set +# CONFIG_FB_MSM_TVOUT_PAL_M is not set +# CONFIG_FB_MSM_TVOUT_PAL_N is not set +CONFIG_FB_MSM_TVOUT_NONE=y +# CONFIG_FB_MSM_DEFAULT_DEPTH_RGB565 is not set +# CONFIG_FB_MSM_DEFAULT_DEPTH_ARGB8888 is not set +CONFIG_FB_MSM_DEFAULT_DEPTH_BGRA8888=y +# CONFIG_FB_MSM_DEFAULT_DEPTH_RGBA8888 is not set +# CONFIG_FB_MSM_EBI2_EPSON_S1D_QVGA_PANEL is not set +# CONFIG_FB_MSM_EBI2_PANEL_DETECT is not set +# CONFIG_EXYNOS_VIDEO is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=m +# CONFIG_LCD_L4F00242T03 is not set +# CONFIG_LCD_LMS283GF05 is not set +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LCD_PLATFORM is not set +# CONFIG_LCD_S6E63M0 is not set +# CONFIG_LCD_LD9040 is not set +# CONFIG_LCD_AMS369FG06 is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LP855X is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +CONFIG_FONT_SUN8x16=y +CONFIG_FONT_SUN12x22=y +CONFIG_FONT_10x18=y +# CONFIG_LOGO is not set +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_RAWMIDI=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_HRTIMER is not set +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS5535AUDIO is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=y +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +CONFIG_SND_SOC=y + +# +# MSM SoC Audio support +# +CONFIG_SND_SOC_MSM_HOSTLESS_PCM=y +CONFIG_SND_SOC_MSM_QDSP6_HDMI_AUDIO=y +CONFIG_SND_SOC_MSM_QDSP6_INTF=y +# CONFIG_SND_SOC_MSM_QDSP6V2_INTF is not set +CONFIG_SND_SOC_VOICE=y +CONFIG_SND_SOC_QDSP6=y +# CONFIG_SND_SOC_QDSP6V2 is not set +CONFIG_SND_SOC_MSM8960=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_WCD9304=y +CONFIG_SND_SOC_WCD9310=y +CONFIG_SND_SOC_CS8427=y +CONFIG_SND_SOC_MSM_STUB=y +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=y +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LOGITECH is not set +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB_ARCH_HAS_XHCI=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_DWC3 is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_EHSET=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_EHCI_MSM_HSIC=y +CONFIG_USB_EHCI_MSM_HOST4=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_PEHCI_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_ISD200=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +CONFIG_USB_STORAGE_ALAUDA=y +CONFIG_USB_STORAGE_ONETOUCH=y +CONFIG_USB_STORAGE_KARMA=y +CONFIG_USB_STORAGE_CYPRESS_ATACB=y +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_EZUSB is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +CONFIG_USB_SERIAL_QUALCOMM=y +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set +# CONFIG_USB_SERIAL_ZIO is not set +# CONFIG_USB_SERIAL_SSU100 is not set +CONFIG_USB_SERIAL_CSVT=y +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +CONFIG_USB_EHSET_TEST_FIXTURE=y +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_QCOM_DIAG_BRIDGE=y +# CONFIG_USB_QCOM_DIAG_BRIDGE_TEST is not set +CONFIG_USB_QCOM_MDM_BRIDGE=y +CONFIG_USB_QCOM_KS_BRIDGE=y +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +CONFIG_USB_GADGET_DEBUG_FILES=y +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FUSB300 is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_CI13XXX_PCI is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_LANGWELL is not set +# CONFIG_USB_EG20T is not set +CONFIG_USB_CI13XXX_MSM=y +# CONFIG_USB_CI13XXX_MSM_HSIC is not set +# CONFIG_USB_DWC3_MSM is not set +# CONFIG_USB_MSM_72K is not set +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_GADGET_SUPERSPEED is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +CONFIG_USB_G_ANDROID=y +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +CONFIG_USB_CSW_HACK=y +# CONFIG_USB_MSC_PROFILING is not set +CONFIG_MODEM_SUPPORT=y +CONFIG_RMNET_SMD_CTL_CHANNEL="" +CONFIG_RMNET_SMD_DATA_CHANNEL="" + +# +# OTG and related infrastructure +# +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_OTG_WAKELOCK is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ULPI is not set +# CONFIG_USB_MSM_OTG_72K is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_USB_MSM_OTG=y +# CONFIG_USB_MSM_ACA is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_PERF_PROFILING=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_CLKGATE=y +# CONFIG_MMC_EMBEDDED_SDIO is not set +CONFIG_MMC_PARANOID_SD_INIT=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_MMC_BLOCK_BOUNCE is not set +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set +# CONFIG_SDIO_UART is not set +CONFIG_MMC_TEST=m +# CONFIG_MMC_BLOCK_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_SDHCI_PXAV3 is not set +# CONFIG_MMC_SDHCI_PXAV2 is not set +CONFIG_MMC_MSM=y +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MMC_MSM_SDC1_SUPPORT=y +CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT=y +# CONFIG_MMC_MSM_SDC2_SUPPORT is not set +CONFIG_MMC_MSM_SDC3_SUPPORT=y +# CONFIG_MMC_MSM_SDC3_POLLING is not set +# CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT is not set +CONFIG_MMC_MSM_SDC3_WP_SUPPORT=y +CONFIG_MMC_MSM_SDC4_SUPPORT=y +CONFIG_MMC_MSM_SDC4_8_BIT_SUPPORT=y +# CONFIG_MMC_MSM_SDC5_SUPPORT is not set +CONFIG_MMC_MSM_SPS_SUPPORT=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_PCA9532 is not set +# CONFIG_LEDS_GPIO is not set +# CONFIG_LEDS_MSM_PDM is not set +# CONFIG_LEDS_PMIC_MPP is not set +# CONFIG_LEDS_MSM_TRICOLOR is not set +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_CPLD is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_PCA955X is not set +CONFIG_LEDS_PM8XXX=y +# CONFIG_LEDS_PCA9633 is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_MSM_PMIC is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_RENESAS_TPU is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_OT200 is not set +CONFIG_LEDS_TRIGGERS=y + +# +# LED Triggers +# +# CONFIG_LEDS_TRIGGER_TIMER is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +# CONFIG_LEDS_TRIGGER_SLEEP is not set + +# +# iptables trigger is under Netfilter config (LED target) +# +CONFIG_SWITCH=y +# CONFIG_SWITCH_GPIO is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_ALARM=y +CONFIG_RTC_INTF_ALARM_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_MSM is not set +# CONFIG_RTC_DRV_MSM7X00A is not set +CONFIG_RTC_DRV_PM8XXX=y +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_BALLOON is not set +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +CONFIG_STAGING=y +# CONFIG_ET131X is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_ECHO is not set +# CONFIG_ASUS_OLED is not set +# CONFIG_R8187SE is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_R8712U is not set +# CONFIG_RTS_PSTOR is not set +# CONFIG_RTS5139 is not set +# CONFIG_TRANZPORT is not set +# CONFIG_IDE_PHISON is not set +# CONFIG_LINE6_USB is not set +# CONFIG_USB_SERIAL_QUATECH2 is not set +# CONFIG_USB_SERIAL_QUATECH_USB2 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set +# CONFIG_VME_BUS is not set +# CONFIG_DX_SEP is not set +# CONFIG_IIO is not set +CONFIG_QCACHE=y +# CONFIG_FB_SM7XX is not set +# CONFIG_CRYSTALHD is not set +# CONFIG_FB_XGI is not set +# CONFIG_USB_ENESTORAGE is not set +# CONFIG_BCM_WIMAX is not set +# CONFIG_FT1000 is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_PERSISTENT_RAM=y +CONFIG_ANDROID_RAM_CONSOLE=y +# CONFIG_PERSISTENT_TRACER is not set +CONFIG_ANDROID_TIMED_OUTPUT=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +# CONFIG_ANDROID_SWITCH is not set +# CONFIG_ANDROID_INTF_ALARM_DEV is not set +# CONFIG_PHONE is not set +# CONFIG_USB_WPAN_HCD is not set + +# +# Qualcomm MSM specific device drivers +# +CONFIG_MSM_SSBI=y +CONFIG_SPS=y +# CONFIG_USB_BAM is not set +CONFIG_SPS_SUPPORT_BAMDMA=y +# CONFIG_SPS_SUPPORT_NDP_BAM is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y + +# +# Hardware Spinlock drivers +# +CONFIG_IOMMU_SUPPORT=y +CONFIG_MSM_IOMMU=y +CONFIG_IOMMU_PGTABLES_L2=y + +# +# Remoteproc drivers (EXPERIMENTAL) +# + +# +# Rpmsg drivers (EXPERIMENTAL) +# +# CONFIG_VIRT_DRIVERS is not set +# CONFIG_PM_DEVFREQ is not set +CONFIG_MOBICORE_SUPPORT=m +# CONFIG_MOBICORE_DEBUG is not set +CONFIG_MOBICORE_API=m +CONFIG_MSM_QDSS=y +# CONFIG_MSM_QDSS_STM_DEFAULT_ENABLE is not set +CONFIG_MSM_QDSS_ETM_DEFAULT_ENABLE=y + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_XATTR=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +# CONFIG_CUSE is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_LOGFS is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_V4_1 is not set +# CONFIG_ROOT_NFS is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +CONFIG_PRINTK_TIME=y +CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_LOCKUP_DETECTOR=y +# CONFIG_HARDLOCKUP_DETECTOR is not set +# CONFIG_BOOTPARAM_HARDLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=0 +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_LOCK_STAT is not set +CONFIG_DEBUG_ATOMIC_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +CONFIG_STACKTRACE=y +CONFIG_DEBUG_STACK_USAGE=y +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_HIGHMEM is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_RCU_CPU_STALL_VERBOSE=y +# CONFIG_RCU_CPU_STALL_INFO is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_LKDTM is not set +# CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_EVENT_POWER_TRACING_DEPRECATED=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_RING_BUFFER_ALLOW_SWAP=y +CONFIG_TRACING=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SCHED_TRACER is not set +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_KPROBE_EVENT=y +# CONFIG_RING_BUFFER_BENCHMARK is not set +CONFIG_DYNAMIC_DEBUG=y +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_ARM_UNWIND=y +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_RODATA is not set +# CONFIG_DEBUG_LL is not set +# CONFIG_ARM_KPROBES_TEST is not set +CONFIG_PID_IN_CONTEXTIDR=y + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_GHASH is not set +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +CONFIG_CRYPTO_DEV_QCE40=y +CONFIG_CRYPTO_DEV_QCRYPTO=m +CONFIG_CRYPTO_DEV_QCE=m +CONFIG_CRYPTO_DEV_QCEDEV=m +# CONFIG_CRYPTO_DEV_OTA_CRYPTO is not set +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_AUDIT_GENERIC=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +# CONFIG_XZ_DEC is not set +# CONFIG_XZ_DEC_BCJ is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=y +CONFIG_TEXTSEARCH_BM=y +CONFIG_TEXTSEARCH_FSM=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_NLATTR=y +# CONFIG_AVERAGE is not set +# CONFIG_CORDIC is not set -- GitLab From 564ce1078f521479b5b38990523d501efebe56b4 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Tue, 3 Jul 2012 18:49:35 +0200 Subject: [PATCH 003/139] driver-core: Move kobj_to_dev from genhd.h to device.h This function is not really specific to the genhd layer and there are various re-implementations or open-coded variants of it all throughout the kernel. To avoid further duplications move the function to a more generic place. While moving also convert it from a macro to a inline function. Potential users of this function can be detected and converted using the following coccinelle patch: // @@ expression k; @@ -container_of(k, struct device, kobj) +kobj_to_dev(kobj) // Signed-off-by: Lars-Peter Clausen Signed-off-by: Greg Kroah-Hartman --- include/linux/device.h | 5 +++++ include/linux/genhd.h | 1 - 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/include/linux/device.h b/include/linux/device.h index 9fca83bcdb5d..ef3cde138bd4 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -688,6 +688,11 @@ struct device { void (*release)(struct device *dev); }; +static inline struct device *kobj_to_dev(struct kobject *kobj) +{ + return container_of(kobj, struct device, kobj); +} + /* Get the wakeup routines, which depend on struct device */ #include diff --git a/include/linux/genhd.h b/include/linux/genhd.h index 017a7fb5a1fc..ae0aaa9d42fa 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h @@ -16,7 +16,6 @@ #ifdef CONFIG_BLOCK -#define kobj_to_dev(k) container_of((k), struct device, kobj) #define dev_to_disk(device) container_of((device), struct gendisk, part0.__dev) #define dev_to_part(device) container_of((device), struct hd_struct, __dev) #define disk_to_dev(disk) (&(disk)->part0.__dev) -- GitLab From f463613ecca8802cd313afd4bb0e5ec62e32c1cd Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Tue, 3 Jul 2012 18:49:36 +0200 Subject: [PATCH 004/139] driver-core: Use kobj_to_dev instead of re-implementing it Signed-off-by: Lars-Peter Clausen Signed-off-by: Greg Kroah-Hartman --- drivers/base/core.c | 17 ++++++++--------- drivers/base/firmware_class.c | 6 ++---- 2 files changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/base/core.c b/drivers/base/core.c index 8e01c9417f4d..cc0773e583f4 100644 --- a/drivers/base/core.c +++ b/drivers/base/core.c @@ -84,14 +84,13 @@ const char *dev_driver_string(const struct device *dev) } EXPORT_SYMBOL(dev_driver_string); -#define to_dev(obj) container_of(obj, struct device, kobj) #define to_dev_attr(_attr) container_of(_attr, struct device_attribute, attr) static ssize_t dev_attr_show(struct kobject *kobj, struct attribute *attr, char *buf) { struct device_attribute *dev_attr = to_dev_attr(attr); - struct device *dev = to_dev(kobj); + struct device *dev = kobj_to_dev(kobj); ssize_t ret = -EIO; if (dev_attr->show) @@ -107,7 +106,7 @@ static ssize_t dev_attr_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) { struct device_attribute *dev_attr = to_dev_attr(attr); - struct device *dev = to_dev(kobj); + struct device *dev = kobj_to_dev(kobj); ssize_t ret = -EIO; if (dev_attr->store) @@ -181,7 +180,7 @@ EXPORT_SYMBOL_GPL(device_show_int); */ static void device_release(struct kobject *kobj) { - struct device *dev = to_dev(kobj); + struct device *dev = kobj_to_dev(kobj); struct device_private *p = dev->p; if (dev->release) @@ -199,7 +198,7 @@ static void device_release(struct kobject *kobj) static const void *device_namespace(struct kobject *kobj) { - struct device *dev = to_dev(kobj); + struct device *dev = kobj_to_dev(kobj); const void *ns = NULL; if (dev->class && dev->class->ns_type) @@ -220,7 +219,7 @@ static int dev_uevent_filter(struct kset *kset, struct kobject *kobj) struct kobj_type *ktype = get_ktype(kobj); if (ktype == &device_ktype) { - struct device *dev = to_dev(kobj); + struct device *dev = kobj_to_dev(kobj); if (dev->bus) return 1; if (dev->class) @@ -231,7 +230,7 @@ static int dev_uevent_filter(struct kset *kset, struct kobject *kobj) static const char *dev_uevent_name(struct kset *kset, struct kobject *kobj) { - struct device *dev = to_dev(kobj); + struct device *dev = kobj_to_dev(kobj); if (dev->bus) return dev->bus->name; @@ -243,7 +242,7 @@ static const char *dev_uevent_name(struct kset *kset, struct kobject *kobj) static int dev_uevent(struct kset *kset, struct kobject *kobj, struct kobj_uevent_env *env) { - struct device *dev = to_dev(kobj); + struct device *dev = kobj_to_dev(kobj); int retval = 0; /* add device node properties if present */ @@ -1132,7 +1131,7 @@ int device_register(struct device *dev) */ struct device *get_device(struct device *dev) { - return dev ? to_dev(kobject_get(&dev->kobj)) : NULL; + return dev ? kobj_to_dev(kobject_get(&dev->kobj)) : NULL; } /** diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 5401814c874d..803cfc1597a9 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -22,8 +22,6 @@ #include #include -#define to_dev(obj) container_of(obj, struct device, kobj) - MODULE_AUTHOR("Manuel Estrada Sainz"); MODULE_DESCRIPTION("Multi purpose firmware loading support"); MODULE_LICENSE("GPL"); @@ -290,7 +288,7 @@ static ssize_t firmware_data_read(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buffer, loff_t offset, size_t count) { - struct device *dev = to_dev(kobj); + struct device *dev = kobj_to_dev(kobj); struct firmware_priv *fw_priv = to_firmware_priv(dev); struct firmware *fw; ssize_t ret_count; @@ -384,7 +382,7 @@ static ssize_t firmware_data_write(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buffer, loff_t offset, size_t count) { - struct device *dev = to_dev(kobj); + struct device *dev = kobj_to_dev(kobj); struct firmware_priv *fw_priv = to_firmware_priv(dev); struct firmware *fw; ssize_t retval; -- GitLab From 511fba0006fec9567c1c73fa52f9c416adb0410e Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Fri, 17 Aug 2012 22:06:59 +0800 Subject: [PATCH 005/139] PM / Sleep: introduce dpm_for_each_dev dpm_list and its pm lock provide a good way to iterate all devices in system. Except this way, there is no other easy way to iterate devices in system. firmware loader need to cache firmware images for devices before system sleep, so introduce the function to meet its demand. Reported-by: Fengguang Wu Signed-off-by: Ming Lei Signed-off-by: Greg Kroah-Hartman --- drivers/base/power/main.c | 22 ++++++++++++++++++++++ include/linux/pm.h | 5 +++++ 2 files changed, 27 insertions(+) diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c index 456270065570..e9a9c5004438 100644 --- a/drivers/base/power/main.c +++ b/drivers/base/power/main.c @@ -1359,3 +1359,25 @@ int device_pm_wait_for_dev(struct device *subordinate, struct device *dev) return async_error; } EXPORT_SYMBOL_GPL(device_pm_wait_for_dev); + +/** + * dpm_for_each_dev - device iterator. + * @data: data for the callback. + * @fn: function to be called for each device. + * + * Iterate over devices in dpm_list, and call @fn for each device, + * passing it @data. + */ +void dpm_for_each_dev(void *data, void (*fn)(struct device *, void *)) +{ + struct device *dev; + + if (!fn) + return; + + device_pm_lock(); + list_for_each_entry(dev, &dpm_list, power.entry) + fn(dev, data); + device_pm_unlock(); +} +EXPORT_SYMBOL_GPL(dpm_for_each_dev); diff --git a/include/linux/pm.h b/include/linux/pm.h index 715305e05123..f5c16da5fcbb 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h @@ -640,6 +640,7 @@ extern void __suspend_report_result(const char *function, void *fn, int ret); } while (0) extern int device_pm_wait_for_dev(struct device *sub, struct device *dev); +extern void dpm_for_each_dev(void *data, void (*fn)(struct device *, void *)); extern int pm_generic_prepare(struct device *dev); extern int pm_generic_suspend_late(struct device *dev); @@ -679,6 +680,10 @@ static inline int device_pm_wait_for_dev(struct device *a, struct device *b) return 0; } +static inline void dpm_for_each_dev(void *data, void (*fn)(struct device *, void *)) +{ +} + #define pm_generic_prepare NULL #define pm_generic_suspend NULL #define pm_generic_resume NULL -- GitLab From 7c49a3c430abb8923e00b1f5e063e2ef97db4691 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:26 +0800 Subject: [PATCH 006/139] driver core: devres: introduce devres_for_each_res This patch introduces one devres API of devres_for_each_res so that the device's driver can iterate each resource it has interest in. The firmware loader will use the API to get each firmware name from the device instance. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/devres.c | 42 ++++++++++++++++++++++++++++++++++++++++++ include/linux/device.h | 4 ++++ 2 files changed, 46 insertions(+) diff --git a/drivers/base/devres.c b/drivers/base/devres.c index 524bf96c289f..bb841ee41997 100644 --- a/drivers/base/devres.c +++ b/drivers/base/devres.c @@ -143,6 +143,48 @@ void * devres_alloc(dr_release_t release, size_t size, gfp_t gfp) EXPORT_SYMBOL_GPL(devres_alloc); #endif +/** + * devres_for_each_res - Resource iterator + * @dev: Device to iterate resource from + * @release: Look for resources associated with this release function + * @match: Match function (optional) + * @match_data: Data for the match function + * @fn: Function to be called for each matched resource. + * @data: Data for @fn, the 3rd parameter of @fn + * + * Call @fn for each devres of @dev which is associated with @release + * and for which @match returns 1. + * + * RETURNS: + * void + */ +void devres_for_each_res(struct device *dev, dr_release_t release, + dr_match_t match, void *match_data, + void (*fn)(struct device *, void *, void *), + void *data) +{ + struct devres_node *node; + struct devres_node *tmp; + unsigned long flags; + + if (!fn) + return; + + spin_lock_irqsave(&dev->devres_lock, flags); + list_for_each_entry_safe_reverse(node, tmp, + &dev->devres_head, entry) { + struct devres *dr = container_of(node, struct devres, node); + + if (node->release != release) + continue; + if (match && !match(dev, dr->data, match_data)) + continue; + fn(dev, dr->data, data); + } + spin_unlock_irqrestore(&dev->devres_lock, flags); +} +EXPORT_SYMBOL_GPL(devres_for_each_res); + /** * devres_free - Free device resource data * @res: Pointer to devres data to free diff --git a/include/linux/device.h b/include/linux/device.h index ef3cde138bd4..d696623107a5 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -531,6 +531,10 @@ extern void *__devres_alloc(dr_release_t release, size_t size, gfp_t gfp, #else extern void *devres_alloc(dr_release_t release, size_t size, gfp_t gfp); #endif +extern void devres_for_each_res(struct device *dev, dr_release_t release, + dr_match_t match, void *match_data, + void (*fn)(struct device *, void *, void *), + void *data); extern void devres_free(void *res); extern void devres_add(struct device *dev, void *res); extern void *devres_find(struct device *dev, dr_release_t release, -- GitLab From e48b49896d4b1fc6858b2a79f9e301ea76a48824 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:16 +0800 Subject: [PATCH 007/139] firmware loader: simplify pages ownership transfer This patch doesn't transfer ownership of pages' buffer to the instance of firmware until the firmware loading is completed, which will simplify firmware_loading_store a lot, so help to introduce the following cache_firmware and uncache_firmware mechanism during system suspend-resume cycle. In fact, this patch fixes one bug: if writing data into firmware loader device is bypassed between writting 1 and 0 to 'loading', OOPS will be triggered without the patch. Also handle the vmap failure case, and add some comments to make code more readable. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 62 ++++++++++++++++++++++------------- 1 file changed, 39 insertions(+), 23 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 803cfc1597a9..1cbefcfd15f7 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -93,6 +93,8 @@ struct firmware_priv { struct completion completion; struct firmware *fw; unsigned long status; + void *data; + size_t size; struct page **pages; int nr_pages; int page_array_size; @@ -156,9 +158,11 @@ static void fw_dev_release(struct device *dev) struct firmware_priv *fw_priv = to_firmware_priv(dev); int i; + /* free untransfered pages buffer */ for (i = 0; i < fw_priv->nr_pages; i++) __free_page(fw_priv->pages[i]); kfree(fw_priv->pages); + kfree(fw_priv); module_put(THIS_MODULE); @@ -194,6 +198,7 @@ static ssize_t firmware_loading_show(struct device *dev, return sprintf(buf, "%d\n", loading); } +/* firmware holds the ownership of pages */ static void firmware_free_data(const struct firmware *fw) { int i; @@ -237,9 +242,7 @@ static ssize_t firmware_loading_store(struct device *dev, switch (loading) { case 1: - firmware_free_data(fw_priv->fw); - memset(fw_priv->fw, 0, sizeof(struct firmware)); - /* If the pages are not owned by 'struct firmware' */ + /* discarding any previous partial load */ for (i = 0; i < fw_priv->nr_pages; i++) __free_page(fw_priv->pages[i]); kfree(fw_priv->pages); @@ -250,20 +253,6 @@ static ssize_t firmware_loading_store(struct device *dev, break; case 0: if (test_bit(FW_STATUS_LOADING, &fw_priv->status)) { - vunmap(fw_priv->fw->data); - fw_priv->fw->data = vmap(fw_priv->pages, - fw_priv->nr_pages, - 0, PAGE_KERNEL_RO); - if (!fw_priv->fw->data) { - dev_err(dev, "%s: vmap() failed\n", __func__); - goto err; - } - /* Pages are now owned by 'struct firmware' */ - fw_priv->fw->pages = fw_priv->pages; - fw_priv->pages = NULL; - - fw_priv->page_array_size = 0; - fw_priv->nr_pages = 0; complete(&fw_priv->completion); clear_bit(FW_STATUS_LOADING, &fw_priv->status); break; @@ -273,7 +262,6 @@ static ssize_t firmware_loading_store(struct device *dev, dev_err(dev, "%s: unexpected value (%d)\n", __func__, loading); /* fallthrough */ case -1: - err: fw_load_abort(fw_priv); break; } @@ -299,12 +287,12 @@ static ssize_t firmware_data_read(struct file *filp, struct kobject *kobj, ret_count = -ENODEV; goto out; } - if (offset > fw->size) { + if (offset > fw_priv->size) { ret_count = 0; goto out; } - if (count > fw->size - offset) - count = fw->size - offset; + if (count > fw_priv->size - offset) + count = fw_priv->size - offset; ret_count = count; @@ -396,6 +384,7 @@ static ssize_t firmware_data_write(struct file *filp, struct kobject *kobj, retval = -ENODEV; goto out; } + retval = fw_realloc_buffer(fw_priv, offset + count); if (retval) goto out; @@ -418,7 +407,7 @@ static ssize_t firmware_data_write(struct file *filp, struct kobject *kobj, count -= page_cnt; } - fw->size = max_t(size_t, offset, fw->size); + fw_priv->size = max_t(size_t, offset, fw_priv->size); out: mutex_unlock(&fw_lock); return retval; @@ -504,6 +493,29 @@ static void _request_firmware_cleanup(const struct firmware **firmware_p) *firmware_p = NULL; } +/* transfer the ownership of pages to firmware */ +static int fw_set_page_data(struct firmware_priv *fw_priv) +{ + struct firmware *fw = fw_priv->fw; + + fw_priv->data = vmap(fw_priv->pages, fw_priv->nr_pages, + 0, PAGE_KERNEL_RO); + if (!fw_priv->data) + return -ENOMEM; + + fw->data = fw_priv->data; + fw->pages = fw_priv->pages; + fw->size = fw_priv->size; + + WARN_ON(PFN_UP(fw->size) != fw_priv->nr_pages); + + fw_priv->nr_pages = 0; + fw_priv->pages = NULL; + fw_priv->data = NULL; + + return 0; +} + static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, long timeout) { @@ -549,8 +561,12 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, del_timer_sync(&fw_priv->timeout); mutex_lock(&fw_lock); - if (!fw_priv->fw->size || test_bit(FW_STATUS_ABORT, &fw_priv->status)) + if (!fw_priv->size || test_bit(FW_STATUS_ABORT, &fw_priv->status)) retval = -ENOENT; + + /* transfer pages ownership at the last minute */ + if (!retval) + retval = fw_set_page_data(fw_priv); fw_priv->fw = NULL; mutex_unlock(&fw_lock); -- GitLab From 69ad49785dc768e457f202b99f6b06519babec4a Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:17 +0800 Subject: [PATCH 008/139] firmware loader: fix races during loading firmware This patch fixes two races in loading firmware: 1, FW_STATUS_DONE should be set before waking up the task waitting on _request_firmware_load, otherwise FW_STATUS_ABORT may be thought as DONE mistakenly. 2, Inside _request_firmware_load(), there is a small window between wait_for_completion() and mutex_lock(&fw_lock), and 'echo 1 > loading' still may happen during the period, so this patch checks FW_STATUS_DONE to prevent pages' buffer completed from being freed in firmware_loading_store. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 1cbefcfd15f7..1915ad821688 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -243,18 +243,21 @@ static ssize_t firmware_loading_store(struct device *dev, switch (loading) { case 1: /* discarding any previous partial load */ - for (i = 0; i < fw_priv->nr_pages; i++) - __free_page(fw_priv->pages[i]); - kfree(fw_priv->pages); - fw_priv->pages = NULL; - fw_priv->page_array_size = 0; - fw_priv->nr_pages = 0; - set_bit(FW_STATUS_LOADING, &fw_priv->status); + if (!test_bit(FW_STATUS_DONE, &fw_priv->status)) { + for (i = 0; i < fw_priv->nr_pages; i++) + __free_page(fw_priv->pages[i]); + kfree(fw_priv->pages); + fw_priv->pages = NULL; + fw_priv->page_array_size = 0; + fw_priv->nr_pages = 0; + set_bit(FW_STATUS_LOADING, &fw_priv->status); + } break; case 0: if (test_bit(FW_STATUS_LOADING, &fw_priv->status)) { - complete(&fw_priv->completion); + set_bit(FW_STATUS_DONE, &fw_priv->status); clear_bit(FW_STATUS_LOADING, &fw_priv->status); + complete(&fw_priv->completion); break; } /* fallthrough */ @@ -557,7 +560,6 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, wait_for_completion(&fw_priv->completion); - set_bit(FW_STATUS_DONE, &fw_priv->status); del_timer_sync(&fw_priv->timeout); mutex_lock(&fw_lock); -- GitLab From 9dd81ccef61a7997232226715dbe39b263a318d7 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:18 +0800 Subject: [PATCH 009/139] firmware loader: remove unnecessary wmb() The wmb() inside fw_load_abort is not necessary, since complete() and wait_on_completion() has implied one pair of memory barrier. Also wmb() isn't a correct usage, so just remove it. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 1915ad821688..0bd09c7545c9 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -112,7 +112,6 @@ static struct firmware_priv *to_firmware_priv(struct device *dev) static void fw_load_abort(struct firmware_priv *fw_priv) { set_bit(FW_STATUS_ABORT, &fw_priv->status); - wmb(); complete(&fw_priv->completion); } -- GitLab From ce9195e587984944115a2799319213de4066a8d8 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:19 +0800 Subject: [PATCH 010/139] firmware loader: fix creation failure of fw loader device If one device driver calls request_firmware_nowait() to request several different firmwares' loading, device_add() will return failure since all firmware loader device use same name of the device who is requesting firmware. This patch always use the name of firmware image as the firmware loader device name to fix the problem since the following patches for caching firmware will make sure only one loading for same firmware is alllowd at the same time. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 0bd09c7545c9..04c75b56f4fc 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -452,7 +452,7 @@ fw_create_instance(struct firmware *firmware, const char *fw_name, f_dev = &fw_priv->dev; device_initialize(f_dev); - dev_set_name(f_dev, "%s", dev_name(device)); + dev_set_name(f_dev, "%s", fw_name); f_dev->parent = device; f_dev->class = &firmware_class; -- GitLab From cb30a64dbdcd8b25cb3809a7ae959f8cabbc09f4 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:20 +0800 Subject: [PATCH 011/139] firmware loader: introduce firmware_buf This patch introduces struct firmware_buf to describe the buffer which holds the firmware data, which will make the following cache_firmware/uncache_firmware implemented easily. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 180 +++++++++++++++++++--------------- 1 file changed, 102 insertions(+), 78 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 04c75b56f4fc..5f2076e5d5b1 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -89,7 +89,7 @@ static inline long firmware_loading_timeout(void) * guarding for corner cases a global lock should be OK */ static DEFINE_MUTEX(fw_lock); -struct firmware_priv { +struct firmware_buf { struct completion completion; struct firmware *fw; unsigned long status; @@ -98,10 +98,14 @@ struct firmware_priv { struct page **pages; int nr_pages; int page_array_size; + char fw_id[]; +}; + +struct firmware_priv { struct timer_list timeout; - struct device dev; bool nowait; - char fw_id[]; + struct device dev; + struct firmware_buf *buf; }; static struct firmware_priv *to_firmware_priv(struct device *dev) @@ -111,8 +115,10 @@ static struct firmware_priv *to_firmware_priv(struct device *dev) static void fw_load_abort(struct firmware_priv *fw_priv) { - set_bit(FW_STATUS_ABORT, &fw_priv->status); - complete(&fw_priv->completion); + struct firmware_buf *buf = fw_priv->buf; + + set_bit(FW_STATUS_ABORT, &buf->status); + complete(&buf->completion); } static ssize_t firmware_timeout_show(struct class *class, @@ -152,15 +158,21 @@ static struct class_attribute firmware_class_attrs[] = { __ATTR_NULL }; -static void fw_dev_release(struct device *dev) +static void fw_free_buf(struct firmware_buf *buf) { - struct firmware_priv *fw_priv = to_firmware_priv(dev); int i; - /* free untransfered pages buffer */ - for (i = 0; i < fw_priv->nr_pages; i++) - __free_page(fw_priv->pages[i]); - kfree(fw_priv->pages); + if (!buf) + return; + + for (i = 0; i < buf->nr_pages; i++) + __free_page(buf->pages[i]); + kfree(buf->pages); +} + +static void fw_dev_release(struct device *dev) +{ + struct firmware_priv *fw_priv = to_firmware_priv(dev); kfree(fw_priv); @@ -171,7 +183,7 @@ static int firmware_uevent(struct device *dev, struct kobj_uevent_env *env) { struct firmware_priv *fw_priv = to_firmware_priv(dev); - if (add_uevent_var(env, "FIRMWARE=%s", fw_priv->fw_id)) + if (add_uevent_var(env, "FIRMWARE=%s", fw_priv->buf->fw_id)) return -ENOMEM; if (add_uevent_var(env, "TIMEOUT=%i", loading_timeout)) return -ENOMEM; @@ -192,7 +204,7 @@ static ssize_t firmware_loading_show(struct device *dev, struct device_attribute *attr, char *buf) { struct firmware_priv *fw_priv = to_firmware_priv(dev); - int loading = test_bit(FW_STATUS_LOADING, &fw_priv->status); + int loading = test_bit(FW_STATUS_LOADING, &fw_priv->buf->status); return sprintf(buf, "%d\n", loading); } @@ -231,32 +243,33 @@ static ssize_t firmware_loading_store(struct device *dev, const char *buf, size_t count) { struct firmware_priv *fw_priv = to_firmware_priv(dev); + struct firmware_buf *fw_buf = fw_priv->buf; int loading = simple_strtol(buf, NULL, 10); int i; mutex_lock(&fw_lock); - if (!fw_priv->fw) + if (!fw_buf) goto out; switch (loading) { case 1: /* discarding any previous partial load */ - if (!test_bit(FW_STATUS_DONE, &fw_priv->status)) { - for (i = 0; i < fw_priv->nr_pages; i++) - __free_page(fw_priv->pages[i]); - kfree(fw_priv->pages); - fw_priv->pages = NULL; - fw_priv->page_array_size = 0; - fw_priv->nr_pages = 0; - set_bit(FW_STATUS_LOADING, &fw_priv->status); + if (!test_bit(FW_STATUS_DONE, &fw_buf->status)) { + for (i = 0; i < fw_buf->nr_pages; i++) + __free_page(fw_buf->pages[i]); + kfree(fw_buf->pages); + fw_buf->pages = NULL; + fw_buf->page_array_size = 0; + fw_buf->nr_pages = 0; + set_bit(FW_STATUS_LOADING, &fw_buf->status); } break; case 0: - if (test_bit(FW_STATUS_LOADING, &fw_priv->status)) { - set_bit(FW_STATUS_DONE, &fw_priv->status); - clear_bit(FW_STATUS_LOADING, &fw_priv->status); - complete(&fw_priv->completion); + if (test_bit(FW_STATUS_LOADING, &fw_buf->status)) { + set_bit(FW_STATUS_DONE, &fw_buf->status); + clear_bit(FW_STATUS_LOADING, &fw_buf->status); + complete(&fw_buf->completion); break; } /* fallthrough */ @@ -280,21 +293,21 @@ static ssize_t firmware_data_read(struct file *filp, struct kobject *kobj, { struct device *dev = kobj_to_dev(kobj); struct firmware_priv *fw_priv = to_firmware_priv(dev); - struct firmware *fw; + struct firmware_buf *buf; ssize_t ret_count; mutex_lock(&fw_lock); - fw = fw_priv->fw; - if (!fw || test_bit(FW_STATUS_DONE, &fw_priv->status)) { + buf = fw_priv->buf; + if (!buf || test_bit(FW_STATUS_DONE, &buf->status)) { ret_count = -ENODEV; goto out; } - if (offset > fw_priv->size) { + if (offset > buf->size) { ret_count = 0; goto out; } - if (count > fw_priv->size - offset) - count = fw_priv->size - offset; + if (count > buf->size - offset) + count = buf->size - offset; ret_count = count; @@ -304,11 +317,11 @@ static ssize_t firmware_data_read(struct file *filp, struct kobject *kobj, int page_ofs = offset & (PAGE_SIZE-1); int page_cnt = min_t(size_t, PAGE_SIZE - page_ofs, count); - page_data = kmap(fw_priv->pages[page_nr]); + page_data = kmap(buf->pages[page_nr]); memcpy(buffer, page_data + page_ofs, page_cnt); - kunmap(fw_priv->pages[page_nr]); + kunmap(buf->pages[page_nr]); buffer += page_cnt; offset += page_cnt; count -= page_cnt; @@ -320,12 +333,13 @@ static ssize_t firmware_data_read(struct file *filp, struct kobject *kobj, static int fw_realloc_buffer(struct firmware_priv *fw_priv, int min_size) { + struct firmware_buf *buf = fw_priv->buf; int pages_needed = ALIGN(min_size, PAGE_SIZE) >> PAGE_SHIFT; /* If the array of pages is too small, grow it... */ - if (fw_priv->page_array_size < pages_needed) { + if (buf->page_array_size < pages_needed) { int new_array_size = max(pages_needed, - fw_priv->page_array_size * 2); + buf->page_array_size * 2); struct page **new_pages; new_pages = kmalloc(new_array_size * sizeof(void *), @@ -334,24 +348,24 @@ static int fw_realloc_buffer(struct firmware_priv *fw_priv, int min_size) fw_load_abort(fw_priv); return -ENOMEM; } - memcpy(new_pages, fw_priv->pages, - fw_priv->page_array_size * sizeof(void *)); - memset(&new_pages[fw_priv->page_array_size], 0, sizeof(void *) * - (new_array_size - fw_priv->page_array_size)); - kfree(fw_priv->pages); - fw_priv->pages = new_pages; - fw_priv->page_array_size = new_array_size; + memcpy(new_pages, buf->pages, + buf->page_array_size * sizeof(void *)); + memset(&new_pages[buf->page_array_size], 0, sizeof(void *) * + (new_array_size - buf->page_array_size)); + kfree(buf->pages); + buf->pages = new_pages; + buf->page_array_size = new_array_size; } - while (fw_priv->nr_pages < pages_needed) { - fw_priv->pages[fw_priv->nr_pages] = + while (buf->nr_pages < pages_needed) { + buf->pages[buf->nr_pages] = alloc_page(GFP_KERNEL | __GFP_HIGHMEM); - if (!fw_priv->pages[fw_priv->nr_pages]) { + if (!buf->pages[buf->nr_pages]) { fw_load_abort(fw_priv); return -ENOMEM; } - fw_priv->nr_pages++; + buf->nr_pages++; } return 0; } @@ -374,15 +388,15 @@ static ssize_t firmware_data_write(struct file *filp, struct kobject *kobj, { struct device *dev = kobj_to_dev(kobj); struct firmware_priv *fw_priv = to_firmware_priv(dev); - struct firmware *fw; + struct firmware_buf *buf; ssize_t retval; if (!capable(CAP_SYS_RAWIO)) return -EPERM; mutex_lock(&fw_lock); - fw = fw_priv->fw; - if (!fw || test_bit(FW_STATUS_DONE, &fw_priv->status)) { + buf = fw_priv->buf; + if (!buf || test_bit(FW_STATUS_DONE, &buf->status)) { retval = -ENODEV; goto out; } @@ -399,17 +413,17 @@ static ssize_t firmware_data_write(struct file *filp, struct kobject *kobj, int page_ofs = offset & (PAGE_SIZE - 1); int page_cnt = min_t(size_t, PAGE_SIZE - page_ofs, count); - page_data = kmap(fw_priv->pages[page_nr]); + page_data = kmap(buf->pages[page_nr]); memcpy(page_data + page_ofs, buffer, page_cnt); - kunmap(fw_priv->pages[page_nr]); + kunmap(buf->pages[page_nr]); buffer += page_cnt; offset += page_cnt; count -= page_cnt; } - fw_priv->size = max_t(size_t, offset, fw_priv->size); + buf->size = max_t(size_t, offset, buf->size); out: mutex_unlock(&fw_lock); return retval; @@ -434,20 +448,31 @@ fw_create_instance(struct firmware *firmware, const char *fw_name, struct device *device, bool uevent, bool nowait) { struct firmware_priv *fw_priv; + struct firmware_buf *buf; struct device *f_dev; - fw_priv = kzalloc(sizeof(*fw_priv) + strlen(fw_name) + 1 , GFP_KERNEL); + fw_priv = kzalloc(sizeof(*fw_priv), GFP_KERNEL); if (!fw_priv) { dev_err(device, "%s: kmalloc failed\n", __func__); - return ERR_PTR(-ENOMEM); + fw_priv = ERR_PTR(-ENOMEM); + goto exit; + } + + buf = kzalloc(sizeof(*buf) + strlen(fw_name) + 1, GFP_KERNEL); + if (!buf) { + dev_err(device, "%s: kmalloc failed\n", __func__); + kfree(fw_priv); + fw_priv = ERR_PTR(-ENOMEM); + goto exit; } - fw_priv->fw = firmware; + buf->fw = firmware; + fw_priv->buf = buf; fw_priv->nowait = nowait; - strcpy(fw_priv->fw_id, fw_name); - init_completion(&fw_priv->completion); setup_timer(&fw_priv->timeout, firmware_class_timeout, (u_long) fw_priv); + strcpy(buf->fw_id, fw_name); + init_completion(&buf->completion); f_dev = &fw_priv->dev; @@ -455,7 +480,7 @@ fw_create_instance(struct firmware *firmware, const char *fw_name, dev_set_name(f_dev, "%s", fw_name); f_dev->parent = device; f_dev->class = &firmware_class; - +exit: return fw_priv; } @@ -496,24 +521,18 @@ static void _request_firmware_cleanup(const struct firmware **firmware_p) } /* transfer the ownership of pages to firmware */ -static int fw_set_page_data(struct firmware_priv *fw_priv) +static int fw_set_page_data(struct firmware_buf *buf) { - struct firmware *fw = fw_priv->fw; + struct firmware *fw = buf->fw; - fw_priv->data = vmap(fw_priv->pages, fw_priv->nr_pages, - 0, PAGE_KERNEL_RO); - if (!fw_priv->data) + buf->data = vmap(buf->pages, buf->nr_pages, 0, PAGE_KERNEL_RO); + if (!buf->data) return -ENOMEM; - fw->data = fw_priv->data; - fw->pages = fw_priv->pages; - fw->size = fw_priv->size; - - WARN_ON(PFN_UP(fw->size) != fw_priv->nr_pages); - - fw_priv->nr_pages = 0; - fw_priv->pages = NULL; - fw_priv->data = NULL; + fw->data = buf->data; + fw->pages = buf->pages; + fw->size = buf->size; + WARN_ON(PFN_UP(fw->size) != buf->nr_pages); return 0; } @@ -523,6 +542,7 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, { int retval = 0; struct device *f_dev = &fw_priv->dev; + struct firmware_buf *buf = fw_priv->buf; dev_set_uevent_suppress(f_dev, true); @@ -549,7 +569,7 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, if (uevent) { dev_set_uevent_suppress(f_dev, false); - dev_dbg(f_dev, "firmware: requesting %s\n", fw_priv->fw_id); + dev_dbg(f_dev, "firmware: requesting %s\n", buf->fw_id); if (timeout != MAX_SCHEDULE_TIMEOUT) mod_timer(&fw_priv->timeout, round_jiffies_up(jiffies + timeout)); @@ -557,18 +577,22 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, kobject_uevent(&fw_priv->dev.kobj, KOBJ_ADD); } - wait_for_completion(&fw_priv->completion); + wait_for_completion(&buf->completion); del_timer_sync(&fw_priv->timeout); mutex_lock(&fw_lock); - if (!fw_priv->size || test_bit(FW_STATUS_ABORT, &fw_priv->status)) + if (!buf->size || test_bit(FW_STATUS_ABORT, &buf->status)) retval = -ENOENT; /* transfer pages ownership at the last minute */ if (!retval) - retval = fw_set_page_data(fw_priv); - fw_priv->fw = NULL; + retval = fw_set_page_data(buf); + if (retval) + fw_free_buf(buf); /* free untransfered pages buffer */ + + kfree(buf); + fw_priv->buf = NULL; mutex_unlock(&fw_lock); device_remove_file(f_dev, &dev_attr_loading); -- GitLab From cb7072d14210587303b9cd4ddee9667d1ac3c569 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:21 +0800 Subject: [PATCH 012/139] firmware loader: always let firmware_buf own the pages buffer This patch always let firmware_buf own the pages buffer allocated inside firmware_data_write, and add all instances of firmware_buf into the firmware cache global list. Also introduce one private field in 'struct firmware', so release_firmware will see the instance of firmware_buf associated with the current firmware instance, then just 'free' the instance of firmware_buf. The firmware_buf instance represents one pages buffer for one firmware image, so lots of firmware loading requests can share the same firmware_buf instance if they request the same firmware image file. This patch will make implementation of the following cache_firmware/ uncache_firmware very easy and simple. In fact, the patch improves request_formware/release_firmware: - only request userspace to write firmware image once if several devices share one same firmware image and its drivers call request_firmware concurrently. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 240 ++++++++++++++++++++++++---------- include/linux/firmware.h | 3 + 2 files changed, 174 insertions(+), 69 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 5f2076e5d5b1..848ad97e8d79 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -21,6 +21,7 @@ #include #include #include +#include MODULE_AUTHOR("Manuel Estrada Sainz"); MODULE_DESCRIPTION("Multi purpose firmware loading support"); @@ -85,13 +86,17 @@ static inline long firmware_loading_timeout(void) return loading_timeout > 0 ? loading_timeout * HZ : MAX_SCHEDULE_TIMEOUT; } -/* fw_lock could be moved to 'struct firmware_priv' but since it is just - * guarding for corner cases a global lock should be OK */ -static DEFINE_MUTEX(fw_lock); +struct firmware_cache { + /* firmware_buf instance will be added into the below list */ + spinlock_t lock; + struct list_head head; +}; struct firmware_buf { + struct kref ref; + struct list_head list; struct completion completion; - struct firmware *fw; + struct firmware_cache *fwc; unsigned long status; void *data; size_t size; @@ -106,8 +111,94 @@ struct firmware_priv { bool nowait; struct device dev; struct firmware_buf *buf; + struct firmware *fw; }; +#define to_fwbuf(d) container_of(d, struct firmware_buf, ref) + +/* fw_lock could be moved to 'struct firmware_priv' but since it is just + * guarding for corner cases a global lock should be OK */ +static DEFINE_MUTEX(fw_lock); + +static struct firmware_cache fw_cache; + +static struct firmware_buf *__allocate_fw_buf(const char *fw_name, + struct firmware_cache *fwc) +{ + struct firmware_buf *buf; + + buf = kzalloc(sizeof(*buf) + strlen(fw_name) + 1 , GFP_ATOMIC); + + if (!buf) + return buf; + + kref_init(&buf->ref); + strcpy(buf->fw_id, fw_name); + buf->fwc = fwc; + init_completion(&buf->completion); + + pr_debug("%s: fw-%s buf=%p\n", __func__, fw_name, buf); + + return buf; +} + +static int fw_lookup_and_allocate_buf(const char *fw_name, + struct firmware_cache *fwc, + struct firmware_buf **buf) +{ + struct firmware_buf *tmp; + + spin_lock(&fwc->lock); + list_for_each_entry(tmp, &fwc->head, list) + if (!strcmp(tmp->fw_id, fw_name)) { + kref_get(&tmp->ref); + spin_unlock(&fwc->lock); + *buf = tmp; + return 1; + } + + tmp = __allocate_fw_buf(fw_name, fwc); + if (tmp) + list_add(&tmp->list, &fwc->head); + spin_unlock(&fwc->lock); + + *buf = tmp; + + return tmp ? 0 : -ENOMEM; +} + +static void __fw_free_buf(struct kref *ref) +{ + struct firmware_buf *buf = to_fwbuf(ref); + struct firmware_cache *fwc = buf->fwc; + int i; + + pr_debug("%s: fw-%s buf=%p data=%p size=%u\n", + __func__, buf->fw_id, buf, buf->data, + (unsigned int)buf->size); + + spin_lock(&fwc->lock); + list_del(&buf->list); + spin_unlock(&fwc->lock); + + vunmap(buf->data); + for (i = 0; i < buf->nr_pages; i++) + __free_page(buf->pages[i]); + kfree(buf->pages); + kfree(buf); +} + +static void fw_free_buf(struct firmware_buf *buf) +{ + kref_put(&buf->ref, __fw_free_buf); +} + +static void __init fw_cache_init(void) +{ + spin_lock_init(&fw_cache.lock); + INIT_LIST_HEAD(&fw_cache.head); +} + static struct firmware_priv *to_firmware_priv(struct device *dev) { return container_of(dev, struct firmware_priv, dev); @@ -118,7 +209,7 @@ static void fw_load_abort(struct firmware_priv *fw_priv) struct firmware_buf *buf = fw_priv->buf; set_bit(FW_STATUS_ABORT, &buf->status); - complete(&buf->completion); + complete_all(&buf->completion); } static ssize_t firmware_timeout_show(struct class *class, @@ -158,18 +249,6 @@ static struct class_attribute firmware_class_attrs[] = { __ATTR_NULL }; -static void fw_free_buf(struct firmware_buf *buf) -{ - int i; - - if (!buf) - return; - - for (i = 0; i < buf->nr_pages; i++) - __free_page(buf->pages[i]); - kfree(buf->pages); -} - static void fw_dev_release(struct device *dev) { struct firmware_priv *fw_priv = to_firmware_priv(dev); @@ -212,13 +291,8 @@ static ssize_t firmware_loading_show(struct device *dev, /* firmware holds the ownership of pages */ static void firmware_free_data(const struct firmware *fw) { - int i; - vunmap(fw->data); - if (fw->pages) { - for (i = 0; i < PFN_UP(fw->size); i++) - __free_page(fw->pages[i]); - kfree(fw->pages); - } + WARN_ON(!fw->priv); + fw_free_buf(fw->priv); } /* Some architectures don't have PAGE_KERNEL_RO */ @@ -269,7 +343,7 @@ static ssize_t firmware_loading_store(struct device *dev, if (test_bit(FW_STATUS_LOADING, &fw_buf->status)) { set_bit(FW_STATUS_DONE, &fw_buf->status); clear_bit(FW_STATUS_LOADING, &fw_buf->status); - complete(&fw_buf->completion); + complete_all(&fw_buf->completion); break; } /* fallthrough */ @@ -448,7 +522,6 @@ fw_create_instance(struct firmware *firmware, const char *fw_name, struct device *device, bool uevent, bool nowait) { struct firmware_priv *fw_priv; - struct firmware_buf *buf; struct device *f_dev; fw_priv = kzalloc(sizeof(*fw_priv), GFP_KERNEL); @@ -458,21 +531,10 @@ fw_create_instance(struct firmware *firmware, const char *fw_name, goto exit; } - buf = kzalloc(sizeof(*buf) + strlen(fw_name) + 1, GFP_KERNEL); - if (!buf) { - dev_err(device, "%s: kmalloc failed\n", __func__); - kfree(fw_priv); - fw_priv = ERR_PTR(-ENOMEM); - goto exit; - } - - buf->fw = firmware; - fw_priv->buf = buf; fw_priv->nowait = nowait; + fw_priv->fw = firmware; setup_timer(&fw_priv->timeout, firmware_class_timeout, (u_long) fw_priv); - strcpy(buf->fw_id, fw_name); - init_completion(&buf->completion); f_dev = &fw_priv->dev; @@ -484,12 +546,42 @@ fw_create_instance(struct firmware *firmware, const char *fw_name, return fw_priv; } +/* one pages buffer is mapped/unmapped only once */ +static int fw_map_pages_buf(struct firmware_buf *buf) +{ + buf->data = vmap(buf->pages, buf->nr_pages, 0, PAGE_KERNEL_RO); + if (!buf->data) + return -ENOMEM; + return 0; +} + +/* store the pages buffer info firmware from buf */ +static void fw_set_page_data(struct firmware_buf *buf, struct firmware *fw) +{ + fw->priv = buf; + fw->pages = buf->pages; + fw->size = buf->size; + fw->data = buf->data; + + pr_debug("%s: fw-%s buf=%p data=%p size=%u\n", + __func__, buf->fw_id, buf, buf->data, + (unsigned int)buf->size); +} + +static void _request_firmware_cleanup(const struct firmware **firmware_p) +{ + release_firmware(*firmware_p); + *firmware_p = NULL; +} + static struct firmware_priv * _request_firmware_prepare(const struct firmware **firmware_p, const char *name, struct device *device, bool uevent, bool nowait) { struct firmware *firmware; - struct firmware_priv *fw_priv; + struct firmware_priv *fw_priv = NULL; + struct firmware_buf *buf; + int ret; if (!firmware_p) return ERR_PTR(-EINVAL); @@ -506,35 +598,45 @@ _request_firmware_prepare(const struct firmware **firmware_p, const char *name, return NULL; } - fw_priv = fw_create_instance(firmware, name, device, uevent, nowait); - if (IS_ERR(fw_priv)) { - release_firmware(firmware); + ret = fw_lookup_and_allocate_buf(name, &fw_cache, &buf); + if (!ret) + fw_priv = fw_create_instance(firmware, name, device, + uevent, nowait); + + if (IS_ERR(fw_priv) || ret < 0) { + kfree(firmware); *firmware_p = NULL; + return ERR_PTR(-ENOMEM); + } else if (fw_priv) { + fw_priv->buf = buf; + + /* + * bind with 'buf' now to avoid warning in failure path + * of requesting firmware. + */ + firmware->priv = buf; + return fw_priv; } - return fw_priv; -} - -static void _request_firmware_cleanup(const struct firmware **firmware_p) -{ - release_firmware(*firmware_p); - *firmware_p = NULL; -} -/* transfer the ownership of pages to firmware */ -static int fw_set_page_data(struct firmware_buf *buf) -{ - struct firmware *fw = buf->fw; - - buf->data = vmap(buf->pages, buf->nr_pages, 0, PAGE_KERNEL_RO); - if (!buf->data) - return -ENOMEM; - - fw->data = buf->data; - fw->pages = buf->pages; - fw->size = buf->size; - WARN_ON(PFN_UP(fw->size) != buf->nr_pages); + /* share the cached buf, which is inprogessing or completed */ + check_status: + mutex_lock(&fw_lock); + if (test_bit(FW_STATUS_ABORT, &buf->status)) { + fw_priv = ERR_PTR(-ENOENT); + _request_firmware_cleanup(firmware_p); + goto exit; + } else if (test_bit(FW_STATUS_DONE, &buf->status)) { + fw_priv = NULL; + fw_set_page_data(buf, firmware); + goto exit; + } + mutex_unlock(&fw_lock); + wait_for_completion(&buf->completion); + goto check_status; - return 0; +exit: + mutex_unlock(&fw_lock); + return fw_priv; } static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, @@ -585,13 +687,12 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, if (!buf->size || test_bit(FW_STATUS_ABORT, &buf->status)) retval = -ENOENT; - /* transfer pages ownership at the last minute */ if (!retval) - retval = fw_set_page_data(buf); - if (retval) - fw_free_buf(buf); /* free untransfered pages buffer */ + retval = fw_map_pages_buf(buf); + + /* pass the pages buffer to driver at the last minute */ + fw_set_page_data(buf, fw_priv->fw); - kfree(buf); fw_priv->buf = NULL; mutex_unlock(&fw_lock); @@ -753,6 +854,7 @@ request_firmware_nowait( static int __init firmware_class_init(void) { + fw_cache_init(); return class_register(&firmware_class); } diff --git a/include/linux/firmware.h b/include/linux/firmware.h index 1e7c01189fa6..e85b771f3d8c 100644 --- a/include/linux/firmware.h +++ b/include/linux/firmware.h @@ -12,6 +12,9 @@ struct firmware { size_t size; const u8 *data; struct page **pages; + + /* firmware loader private fields */ + void *priv; }; struct module; -- GitLab From 8ed84a92b9929ae3e8c9fb6fa7fa2d0bdace8f8d Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:22 +0800 Subject: [PATCH 013/139] firmware loader: introduce cache_firmware and uncache_firmware This patches introduce two kernel APIs of cache_firmware and uncache_firmware, both of which take the firmware file name as the only parameter. So any drivers can call cache_firmware to cache the specified firmware file into kernel memory, and can use the cached firmware in situations which can't request firmware from user space. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 100 +++++++++++++++++++++++++++++++--- include/linux/firmware.h | 12 ++++ 2 files changed, 104 insertions(+), 8 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 848ad97e8d79..fc119ce6fdb8 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -142,6 +142,17 @@ static struct firmware_buf *__allocate_fw_buf(const char *fw_name, return buf; } +static struct firmware_buf *__fw_lookup_buf(const char *fw_name) +{ + struct firmware_buf *tmp; + struct firmware_cache *fwc = &fw_cache; + + list_for_each_entry(tmp, &fwc->head, list) + if (!strcmp(tmp->fw_id, fw_name)) + return tmp; + return NULL; +} + static int fw_lookup_and_allocate_buf(const char *fw_name, struct firmware_cache *fwc, struct firmware_buf **buf) @@ -149,14 +160,13 @@ static int fw_lookup_and_allocate_buf(const char *fw_name, struct firmware_buf *tmp; spin_lock(&fwc->lock); - list_for_each_entry(tmp, &fwc->head, list) - if (!strcmp(tmp->fw_id, fw_name)) { - kref_get(&tmp->ref); - spin_unlock(&fwc->lock); - *buf = tmp; - return 1; - } - + tmp = __fw_lookup_buf(fw_name); + if (tmp) { + kref_get(&tmp->ref); + spin_unlock(&fwc->lock); + *buf = tmp; + return 1; + } tmp = __allocate_fw_buf(fw_name, fwc); if (tmp) list_add(&tmp->list, &fwc->head); @@ -167,6 +177,18 @@ static int fw_lookup_and_allocate_buf(const char *fw_name, return tmp ? 0 : -ENOMEM; } +static struct firmware_buf *fw_lookup_buf(const char *fw_name) +{ + struct firmware_buf *tmp; + struct firmware_cache *fwc = &fw_cache; + + spin_lock(&fwc->lock); + tmp = __fw_lookup_buf(fw_name); + spin_unlock(&fwc->lock); + + return tmp; +} + static void __fw_free_buf(struct kref *ref) { struct firmware_buf *buf = to_fwbuf(ref); @@ -852,6 +874,66 @@ request_firmware_nowait( return 0; } +/** + * cache_firmware - cache one firmware image in kernel memory space + * @fw_name: the firmware image name + * + * Cache firmware in kernel memory so that drivers can use it when + * system isn't ready for them to request firmware image from userspace. + * Once it returns successfully, driver can use request_firmware or its + * nowait version to get the cached firmware without any interacting + * with userspace + * + * Return 0 if the firmware image has been cached successfully + * Return !0 otherwise + * + */ +int cache_firmware(const char *fw_name) +{ + int ret; + const struct firmware *fw; + + pr_debug("%s: %s\n", __func__, fw_name); + + ret = request_firmware(&fw, fw_name, NULL); + if (!ret) + kfree(fw); + + pr_debug("%s: %s ret=%d\n", __func__, fw_name, ret); + + return ret; +} + +/** + * uncache_firmware - remove one cached firmware image + * @fw_name: the firmware image name + * + * Uncache one firmware image which has been cached successfully + * before. + * + * Return 0 if the firmware cache has been removed successfully + * Return !0 otherwise + * + */ +int uncache_firmware(const char *fw_name) +{ + struct firmware_buf *buf; + struct firmware fw; + + pr_debug("%s: %s\n", __func__, fw_name); + + if (fw_get_builtin_firmware(&fw, fw_name)) + return 0; + + buf = fw_lookup_buf(fw_name); + if (buf) { + fw_free_buf(buf); + return 0; + } + + return -EINVAL; +} + static int __init firmware_class_init(void) { fw_cache_init(); @@ -869,3 +951,5 @@ module_exit(firmware_class_exit); EXPORT_SYMBOL(release_firmware); EXPORT_SYMBOL(request_firmware); EXPORT_SYMBOL(request_firmware_nowait); +EXPORT_SYMBOL_GPL(cache_firmware); +EXPORT_SYMBOL_GPL(uncache_firmware); diff --git a/include/linux/firmware.h b/include/linux/firmware.h index e85b771f3d8c..e4279fedb93a 100644 --- a/include/linux/firmware.h +++ b/include/linux/firmware.h @@ -47,6 +47,8 @@ int request_firmware_nowait( void (*cont)(const struct firmware *fw, void *context)); void release_firmware(const struct firmware *fw); +int cache_firmware(const char *name); +int uncache_firmware(const char *name); #else static inline int request_firmware(const struct firmware **fw, const char *name, @@ -65,6 +67,16 @@ static inline int request_firmware_nowait( static inline void release_firmware(const struct firmware *fw) { } + +static inline int cache_firmware(const char *name) +{ + return -ENOENT; +} + +static inline int uncache_firmware(const char *name) +{ + return -EINVAL; +} #endif #endif -- GitLab From d4536c9827f0e45076e0f87f9f8f1c3333e04488 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:23 +0800 Subject: [PATCH 014/139] firmware loader: fix device lifetime Callers of request_firmware* must hold the reference count of @device, otherwise it is easy to trigger oops since the firmware loader device is the child of @device. This patch adds comments about the usage. In fact, most of drivers call request_firmware* in its probe() or open(), so the constraint should be reasonable and can be satisfied. Also this patch holds the reference count of @device before schedule_work() in request_firmware_nowait() to avoid that the @device is released after request_firmware_nowait returns and before the worker function is scheduled. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index fc119ce6fdb8..7d3a83bb1318 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -742,6 +742,8 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, * @name will be used as $FIRMWARE in the uevent environment and * should be distinctive enough not to be confused with any other * firmware image for this or any other device. + * + * Caller must hold the reference count of @device. **/ int request_firmware(const struct firmware **firmware_p, const char *name, @@ -823,6 +825,7 @@ static void request_firmware_work_func(struct work_struct *work) out: fw_work->cont(fw, fw_work->context); + put_device(fw_work->device); module_put(fw_work->module); kfree(fw_work); @@ -841,6 +844,8 @@ static void request_firmware_work_func(struct work_struct *work) * @cont: function will be called asynchronously when the firmware * request is over. * + * Caller must hold the reference count of @device. + * * Asynchronous variant of request_firmware() for user contexts where * it is not possible to sleep for long time. It can't be called * in atomic contexts. @@ -869,6 +874,7 @@ request_firmware_nowait( return -EFAULT; } + get_device(fw_work->device); INIT_WORK(&fw_work->work, request_firmware_work_func); schedule_work(&fw_work->work); return 0; -- GitLab From 288c6a213069878bf975310e5b16ff8f4e9a4e2c Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:24 +0800 Subject: [PATCH 015/139] firmware loader: fix comments on request_firmware_nowait request_firmware_nowait is allowed to be called in atomic context now if @gfp is GFP_ATOMIC, so fix the obsolete comments and states which situations are suitable for using it. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 7d3a83bb1318..a47266ccfc60 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -846,9 +846,13 @@ static void request_firmware_work_func(struct work_struct *work) * * Caller must hold the reference count of @device. * - * Asynchronous variant of request_firmware() for user contexts where - * it is not possible to sleep for long time. It can't be called - * in atomic contexts. + * Asynchronous variant of request_firmware() for user contexts: + * - sleep for as small periods as possible since it may + * increase kernel boot time of built-in device drivers + * requesting firmware in their ->probe() methods, if + * @gfp is GFP_KERNEL. + * + * - can't sleep at all if @gfp is GFP_ATOMIC. **/ int request_firmware_nowait( -- GitLab From 374534db4a69d238f855a42cd18ff60d4841da20 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:25 +0800 Subject: [PATCH 016/139] firmware loader: store firmware name into devres list This patch will store firmware name into devres list of the device which is requesting firmware loading, so that we can implement auto cache and uncache firmware for devices in need. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 64 +++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index a47266ccfc60..65c60666685b 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -114,6 +114,11 @@ struct firmware_priv { struct firmware *fw; }; +struct fw_name_devm { + unsigned long magic; + char name[]; +}; + #define to_fwbuf(d) container_of(d, struct firmware_buf, ref) /* fw_lock could be moved to 'struct firmware_priv' but since it is just @@ -590,6 +595,55 @@ static void fw_set_page_data(struct firmware_buf *buf, struct firmware *fw) (unsigned int)buf->size); } +static void fw_name_devm_release(struct device *dev, void *res) +{ + struct fw_name_devm *fwn = res; + + if (fwn->magic == (unsigned long)&fw_cache) + pr_debug("%s: fw_name-%s devm-%p released\n", + __func__, fwn->name, res); +} + +static int fw_devm_match(struct device *dev, void *res, + void *match_data) +{ + struct fw_name_devm *fwn = res; + + return (fwn->magic == (unsigned long)&fw_cache) && + !strcmp(fwn->name, match_data); +} + +static struct fw_name_devm *fw_find_devm_name(struct device *dev, + const char *name) +{ + struct fw_name_devm *fwn; + + fwn = devres_find(dev, fw_name_devm_release, + fw_devm_match, (void *)name); + return fwn; +} + +/* add firmware name into devres list */ +static int fw_add_devm_name(struct device *dev, const char *name) +{ + struct fw_name_devm *fwn; + + fwn = fw_find_devm_name(dev, name); + if (fwn) + return 1; + + fwn = devres_alloc(fw_name_devm_release, sizeof(struct fw_name_devm) + + strlen(name) + 1, GFP_KERNEL); + if (!fwn) + return -ENOMEM; + + fwn->magic = (unsigned long)&fw_cache; + strcpy(fwn->name, name); + devres_add(dev, fwn); + + return 0; +} + static void _request_firmware_cleanup(const struct firmware **firmware_p) { release_firmware(*firmware_p); @@ -709,6 +763,16 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, if (!buf->size || test_bit(FW_STATUS_ABORT, &buf->status)) retval = -ENOENT; + /* + * add firmware name into devres list so that we can auto cache + * and uncache firmware for device. + * + * f_dev->parent may has been deleted already, but the problem + * should be fixed in devres or driver core. + */ + if (!retval && f_dev->parent) + fw_add_devm_name(f_dev->parent, buf->fw_id); + if (!retval) retval = fw_map_pages_buf(buf); -- GitLab From d3778b77b89e21b02e5d0aae0631de67278aa09d Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:27 +0800 Subject: [PATCH 017/139] firmware: introduce device_cache/uncache_fw_images This patch introduces the three helpers below: void device_cache_fw_images(void) void device_uncache_fw_images(void) void device_uncache_fw_images_delay(unsigned long) so we can use device_cache_fw_images() to cache firmware for all devices which need firmware to work, and the device driver can get the firmware easily from kernel memory when system isn't ready for completing requests of loading firmware. After system is ready for completing firmware loading, driver core will call device_uncache_fw_images() or its delay version to free the cached firmware. The above helpers will be used to cache device firmware during system suspend/resume cycle in the following patches. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 221 +++++++++++++++++++++++++++++++++- 1 file changed, 215 insertions(+), 6 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 65c60666685b..68fd4c698c77 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -22,6 +22,11 @@ #include #include #include +#include +#include + +#include "base.h" +#include "power/power.h" MODULE_AUTHOR("Manuel Estrada Sainz"); MODULE_DESCRIPTION("Multi purpose firmware loading support"); @@ -90,6 +95,19 @@ struct firmware_cache { /* firmware_buf instance will be added into the below list */ spinlock_t lock; struct list_head head; + + /* + * Names of firmware images which have been cached successfully + * will be added into the below list so that device uncache + * helper can trace which firmware images have been cached + * before. + */ + spinlock_t name_lock; + struct list_head fw_names; + + wait_queue_head_t wait_queue; + int cnt; + struct delayed_work work; }; struct firmware_buf { @@ -106,6 +124,11 @@ struct firmware_buf { char fw_id[]; }; +struct fw_cache_entry { + struct list_head list; + char name[]; +}; + struct firmware_priv { struct timer_list timeout; bool nowait; @@ -220,12 +243,6 @@ static void fw_free_buf(struct firmware_buf *buf) kref_put(&buf->ref, __fw_free_buf); } -static void __init fw_cache_init(void) -{ - spin_lock_init(&fw_cache.lock); - INIT_LIST_HEAD(&fw_cache.head); -} - static struct firmware_priv *to_firmware_priv(struct device *dev) { return container_of(dev, struct firmware_priv, dev); @@ -1008,6 +1025,198 @@ int uncache_firmware(const char *fw_name) return -EINVAL; } +static struct fw_cache_entry *alloc_fw_cache_entry(const char *name) +{ + struct fw_cache_entry *fce; + + fce = kzalloc(sizeof(*fce) + strlen(name) + 1, GFP_ATOMIC); + if (!fce) + goto exit; + + strcpy(fce->name, name); +exit: + return fce; +} + +static void free_fw_cache_entry(struct fw_cache_entry *fce) +{ + kfree(fce); +} + +static void __async_dev_cache_fw_image(void *fw_entry, + async_cookie_t cookie) +{ + struct fw_cache_entry *fce = fw_entry; + struct firmware_cache *fwc = &fw_cache; + int ret; + + ret = cache_firmware(fce->name); + if (ret) + goto free; + + spin_lock(&fwc->name_lock); + list_add(&fce->list, &fwc->fw_names); + spin_unlock(&fwc->name_lock); + goto drop_ref; + +free: + free_fw_cache_entry(fce); +drop_ref: + spin_lock(&fwc->name_lock); + fwc->cnt--; + spin_unlock(&fwc->name_lock); + + wake_up(&fwc->wait_queue); +} + +/* called with dev->devres_lock held */ +static void dev_create_fw_entry(struct device *dev, void *res, + void *data) +{ + struct fw_name_devm *fwn = res; + const char *fw_name = fwn->name; + struct list_head *head = data; + struct fw_cache_entry *fce; + + fce = alloc_fw_cache_entry(fw_name); + if (fce) + list_add(&fce->list, head); +} + +static int devm_name_match(struct device *dev, void *res, + void *match_data) +{ + struct fw_name_devm *fwn = res; + return (fwn->magic == (unsigned long)match_data); +} + +static void dev_cache_fw_image(struct device *dev) +{ + LIST_HEAD(todo); + struct fw_cache_entry *fce; + struct fw_cache_entry *fce_next; + struct firmware_cache *fwc = &fw_cache; + + devres_for_each_res(dev, fw_name_devm_release, + devm_name_match, &fw_cache, + dev_create_fw_entry, &todo); + + list_for_each_entry_safe(fce, fce_next, &todo, list) { + list_del(&fce->list); + + spin_lock(&fwc->name_lock); + fwc->cnt++; + spin_unlock(&fwc->name_lock); + + async_schedule(__async_dev_cache_fw_image, (void *)fce); + } +} + +static void __device_uncache_fw_images(void) +{ + struct firmware_cache *fwc = &fw_cache; + struct fw_cache_entry *fce; + + spin_lock(&fwc->name_lock); + while (!list_empty(&fwc->fw_names)) { + fce = list_entry(fwc->fw_names.next, + struct fw_cache_entry, list); + list_del(&fce->list); + spin_unlock(&fwc->name_lock); + + uncache_firmware(fce->name); + free_fw_cache_entry(fce); + + spin_lock(&fwc->name_lock); + } + spin_unlock(&fwc->name_lock); +} + +/** + * device_cache_fw_images - cache devices' firmware + * + * If one device called request_firmware or its nowait version + * successfully before, the firmware names are recored into the + * device's devres link list, so device_cache_fw_images can call + * cache_firmware() to cache these firmwares for the device, + * then the device driver can load its firmwares easily at + * time when system is not ready to complete loading firmware. + */ +static void device_cache_fw_images(void) +{ + struct firmware_cache *fwc = &fw_cache; + struct device *dev; + DEFINE_WAIT(wait); + + pr_debug("%s\n", __func__); + + device_pm_lock(); + list_for_each_entry(dev, &dpm_list, power.entry) + dev_cache_fw_image(dev); + device_pm_unlock(); + + /* wait for completion of caching firmware for all devices */ + spin_lock(&fwc->name_lock); + for (;;) { + prepare_to_wait(&fwc->wait_queue, &wait, + TASK_UNINTERRUPTIBLE); + if (!fwc->cnt) + break; + + spin_unlock(&fwc->name_lock); + + schedule(); + + spin_lock(&fwc->name_lock); + } + spin_unlock(&fwc->name_lock); + finish_wait(&fwc->wait_queue, &wait); +} + +/** + * device_uncache_fw_images - uncache devices' firmware + * + * uncache all firmwares which have been cached successfully + * by device_uncache_fw_images earlier + */ +static void device_uncache_fw_images(void) +{ + pr_debug("%s\n", __func__); + __device_uncache_fw_images(); +} + +static void device_uncache_fw_images_work(struct work_struct *work) +{ + device_uncache_fw_images(); +} + +/** + * device_uncache_fw_images_delay - uncache devices firmwares + * @delay: number of milliseconds to delay uncache device firmwares + * + * uncache all devices's firmwares which has been cached successfully + * by device_cache_fw_images after @delay milliseconds. + */ +static void device_uncache_fw_images_delay(unsigned long delay) +{ + schedule_delayed_work(&fw_cache.work, + msecs_to_jiffies(delay)); +} + +static void __init fw_cache_init(void) +{ + spin_lock_init(&fw_cache.lock); + INIT_LIST_HEAD(&fw_cache.head); + + spin_lock_init(&fw_cache.name_lock); + INIT_LIST_HEAD(&fw_cache.fw_names); + fw_cache.cnt = 0; + + init_waitqueue_head(&fw_cache.wait_queue); + INIT_DELAYED_WORK(&fw_cache.work, + device_uncache_fw_images_work); +} + static int __init firmware_class_init(void) { fw_cache_init(); -- GitLab From 1ca78b409f1093611ab8ef080cbcb7d21ce80993 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:28 +0800 Subject: [PATCH 018/139] firmware loader: use small timeout for cache device firmware Because device_cache_fw_images only cache the firmware which has been loaded sucessfully at leat once, using a small loading timeout should be reasonable. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 68fd4c698c77..8ca00524d58f 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -1146,10 +1146,22 @@ static void device_cache_fw_images(void) { struct firmware_cache *fwc = &fw_cache; struct device *dev; + int old_timeout; DEFINE_WAIT(wait); pr_debug("%s\n", __func__); + /* + * use small loading timeout for caching devices' firmware + * because all these firmware images have been loaded + * successfully at lease once, also system is ready for + * completing firmware loading now. The maximum size of + * firmware in current distributions is about 2M bytes, + * so 10 secs should be enough. + */ + old_timeout = loading_timeout; + loading_timeout = 10; + device_pm_lock(); list_for_each_entry(dev, &dpm_list, power.entry) dev_cache_fw_image(dev); @@ -1171,6 +1183,8 @@ static void device_cache_fw_images(void) } spin_unlock(&fwc->name_lock); finish_wait(&fwc->wait_queue, &wait); + + loading_timeout = old_timeout; } /** -- GitLab From a4fe8ce6b736afcc64ff99d46febf4975bd3ea57 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 4 Aug 2012 12:01:29 +0800 Subject: [PATCH 019/139] firmware loader: cache devices firmware during suspend/resume cycle This patch implements caching devices' firmware automatically during system syspend/resume cycle, so any device drivers can call request_firmware or request_firmware_nowait inside resume path to get the cached firmware if they have loaded firmwares successfully at least once before entering suspend. Signed-off-by: Ming Lei Cc: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 8ca00524d58f..5bd2100a4dcf 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "base.h" #include "power/power.h" @@ -108,6 +109,8 @@ struct firmware_cache { wait_queue_head_t wait_queue; int cnt; struct delayed_work work; + + struct notifier_block pm_notify; }; struct firmware_buf { @@ -1217,6 +1220,31 @@ static void device_uncache_fw_images_delay(unsigned long delay) msecs_to_jiffies(delay)); } +#ifdef CONFIG_PM +static int fw_pm_notify(struct notifier_block *notify_block, + unsigned long mode, void *unused) +{ + switch (mode) { + case PM_HIBERNATION_PREPARE: + case PM_SUSPEND_PREPARE: + device_cache_fw_images(); + break; + + case PM_POST_SUSPEND: + case PM_POST_HIBERNATION: + case PM_POST_RESTORE: + device_uncache_fw_images_delay(10 * MSEC_PER_SEC); + break; + } + + return 0; +} +#else +static int fw_pm_notify(struct notifier_block *notify_block, + unsigned long mode, void *unused) +{} +#endif + static void __init fw_cache_init(void) { spin_lock_init(&fw_cache.lock); @@ -1229,6 +1257,9 @@ static void __init fw_cache_init(void) init_waitqueue_head(&fw_cache.wait_queue); INIT_DELAYED_WORK(&fw_cache.work, device_uncache_fw_images_work); + + fw_cache.pm_notify.notifier_call = fw_pm_notify; + register_pm_notifier(&fw_cache.pm_notify); } static int __init firmware_class_init(void) @@ -1239,6 +1270,7 @@ static int __init firmware_class_init(void) static void __exit firmware_class_exit(void) { + unregister_pm_notifier(&fw_cache.pm_notify); class_unregister(&firmware_class); } -- GitLab From 1fb548ad5befadb97136b6f2c78ced868acf0c30 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Fri, 17 Aug 2012 22:06:58 +0800 Subject: [PATCH 020/139] firmware loader: fix compile failure if !PM 'return 0' should be added to fw_pm_notify if !PM because return value of the funcion is defined as 'int'. Reported-by: Fengguang Wu Signed-off-by: Ming Lei Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 5bd2100a4dcf..4c8d8efecdf4 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -1242,7 +1242,9 @@ static int fw_pm_notify(struct notifier_block *notify_block, #else static int fw_pm_notify(struct notifier_block *notify_block, unsigned long mode, void *unused) -{} +{ + return 0; +} #endif static void __init fw_cache_init(void) -- GitLab From 7fee71125a70db0ddadbdfa07eb5c494e1f74a4d Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Fri, 17 Aug 2012 22:07:00 +0800 Subject: [PATCH 021/139] firmware loader: fix build failure if FW_LOADER is m device_cache_fw_images need to iterate devices in system, so this patch applies the introduced dpm_for_each_dev to avoid link failure if CONFIG_FW_LOADER is m. Reported-by: Fengguang Wu Signed-off-by: Ming Lei Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 4c8d8efecdf4..ed0510a912c8 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -27,7 +27,6 @@ #include #include "base.h" -#include "power/power.h" MODULE_AUTHOR("Manuel Estrada Sainz"); MODULE_DESCRIPTION("Multi purpose firmware loading support"); @@ -1093,7 +1092,7 @@ static int devm_name_match(struct device *dev, void *res, return (fwn->magic == (unsigned long)match_data); } -static void dev_cache_fw_image(struct device *dev) +static void dev_cache_fw_image(struct device *dev, void *data) { LIST_HEAD(todo); struct fw_cache_entry *fce; @@ -1148,7 +1147,6 @@ static void __device_uncache_fw_images(void) static void device_cache_fw_images(void) { struct firmware_cache *fwc = &fw_cache; - struct device *dev; int old_timeout; DEFINE_WAIT(wait); @@ -1165,10 +1163,7 @@ static void device_cache_fw_images(void) old_timeout = loading_timeout; loading_timeout = 10; - device_pm_lock(); - list_for_each_entry(dev, &dpm_list, power.entry) - dev_cache_fw_image(dev); - device_pm_unlock(); + dpm_for_each_dev(NULL, dev_cache_fw_image); /* wait for completion of caching firmware for all devices */ spin_lock(&fwc->name_lock); -- GitLab From 679581e16e745cddc07515cd271869c8b0464163 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Mon, 20 Aug 2012 19:04:15 +0800 Subject: [PATCH 022/139] firmware loader: fix firmware -ENOENT situations If the requested firmware image doesn't exist, firmware->priv should be set for the later concurrent requests, otherwise warning and oops will be triggered inside firmware_free_data(). Signed-off-by: Ming Lei Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index ed0510a912c8..edc88bc68b3d 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -718,6 +718,7 @@ _request_firmware_prepare(const struct firmware **firmware_p, const char *name, mutex_lock(&fw_lock); if (test_bit(FW_STATUS_ABORT, &buf->status)) { fw_priv = ERR_PTR(-ENOENT); + firmware->priv = buf; _request_firmware_cleanup(firmware_p); goto exit; } else if (test_bit(FW_STATUS_DONE, &buf->status)) { -- GitLab From 1d3e8a27da4f5b0bcdd64226277d1881da6ba565 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Mon, 20 Aug 2012 19:04:16 +0800 Subject: [PATCH 023/139] firmware loader: let caching firmware piggyback on loading firmware After starting caching firmware, there is still some time left before devices are suspended, during the period, request_firmware or its nowait version may still be triggered by the below situations to load firmware images which can't be cached during suspend/resume cycle. - new devices added - driver bind - or device open kind of things This patch utilizes the piggyback trick to cache firmware for this kind of situation: just increase the firmware buf's reference count and add the fw name entry into cache entry list after starting caching firmware and before syscore_suspend() is called. Signed-off-by: Ming Lei Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 83 +++++++++++++++++++++++++++++++---- 1 file changed, 74 insertions(+), 9 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index edc88bc68b3d..95f6851b3010 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "base.h" @@ -105,6 +106,8 @@ struct firmware_cache { spinlock_t name_lock; struct list_head fw_names; + int state; + wait_queue_head_t wait_queue; int cnt; struct delayed_work work; @@ -146,6 +149,11 @@ struct fw_name_devm { #define to_fwbuf(d) container_of(d, struct firmware_buf, ref) +#define FW_LOADER_NO_CACHE 0 +#define FW_LOADER_START_CACHE 1 + +static int fw_cache_piggyback_on_request(const char *name); + /* fw_lock could be moved to 'struct firmware_priv' but since it is just * guarding for corner cases a global lock should be OK */ static DEFINE_MUTEX(fw_lock); @@ -741,6 +749,7 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, int retval = 0; struct device *f_dev = &fw_priv->dev; struct firmware_buf *buf = fw_priv->buf; + struct firmware_cache *fwc = &fw_cache; dev_set_uevent_suppress(f_dev, true); @@ -796,6 +805,15 @@ static int _request_firmware_load(struct firmware_priv *fw_priv, bool uevent, if (!retval) retval = fw_map_pages_buf(buf); + /* + * After caching firmware image is started, let it piggyback + * on request firmware. + */ + if (!retval && fwc->state == FW_LOADER_START_CACHE) { + if (fw_cache_piggyback_on_request(buf->fw_id)) + kref_get(&buf->ref); + } + /* pass the pages buffer to driver at the last minute */ fw_set_page_data(buf, fw_priv->fw); @@ -1041,6 +1059,29 @@ static struct fw_cache_entry *alloc_fw_cache_entry(const char *name) return fce; } +static int fw_cache_piggyback_on_request(const char *name) +{ + struct firmware_cache *fwc = &fw_cache; + struct fw_cache_entry *fce; + int ret = 0; + + spin_lock(&fwc->name_lock); + list_for_each_entry(fce, &fwc->fw_names, list) { + if (!strcmp(fce->name, name)) + goto found; + } + + fce = alloc_fw_cache_entry(name); + if (fce) { + ret = 1; + list_add(&fce->list, &fwc->fw_names); + pr_debug("%s: fw: %s\n", __func__, name); + } +found: + spin_unlock(&fwc->name_lock); + return ret; +} + static void free_fw_cache_entry(struct fw_cache_entry *fce) { kfree(fce); @@ -1054,17 +1095,14 @@ static void __async_dev_cache_fw_image(void *fw_entry, int ret; ret = cache_firmware(fce->name); - if (ret) - goto free; + if (ret) { + spin_lock(&fwc->name_lock); + list_del(&fce->list); + spin_unlock(&fwc->name_lock); - spin_lock(&fwc->name_lock); - list_add(&fce->list, &fwc->fw_names); - spin_unlock(&fwc->name_lock); - goto drop_ref; + free_fw_cache_entry(fce); + } -free: - free_fw_cache_entry(fce); -drop_ref: spin_lock(&fwc->name_lock); fwc->cnt--; spin_unlock(&fwc->name_lock); @@ -1109,6 +1147,7 @@ static void dev_cache_fw_image(struct device *dev, void *data) spin_lock(&fwc->name_lock); fwc->cnt++; + list_add(&fce->list, &fwc->fw_names); spin_unlock(&fwc->name_lock); async_schedule(__async_dev_cache_fw_image, (void *)fce); @@ -1164,7 +1203,10 @@ static void device_cache_fw_images(void) old_timeout = loading_timeout; loading_timeout = 10; + mutex_lock(&fw_lock); + fwc->state = FW_LOADER_START_CACHE; dpm_for_each_dev(NULL, dev_cache_fw_image); + mutex_unlock(&fw_lock); /* wait for completion of caching firmware for all devices */ spin_lock(&fwc->name_lock); @@ -1229,6 +1271,14 @@ static int fw_pm_notify(struct notifier_block *notify_block, case PM_POST_SUSPEND: case PM_POST_HIBERNATION: case PM_POST_RESTORE: + /* + * In case that system sleep failed and syscore_suspend is + * not called. + */ + mutex_lock(&fw_lock); + fw_cache.state = FW_LOADER_NO_CACHE; + mutex_unlock(&fw_lock); + device_uncache_fw_images_delay(10 * MSEC_PER_SEC); break; } @@ -1243,6 +1293,17 @@ static int fw_pm_notify(struct notifier_block *notify_block, } #endif +/* stop caching firmware once syscore_suspend is reached */ +static int fw_suspend(void) +{ + fw_cache.state = FW_LOADER_NO_CACHE; + return 0; +} + +static struct syscore_ops fw_syscore_ops = { + .suspend = fw_suspend, +}; + static void __init fw_cache_init(void) { spin_lock_init(&fw_cache.lock); @@ -1251,6 +1312,7 @@ static void __init fw_cache_init(void) spin_lock_init(&fw_cache.name_lock); INIT_LIST_HEAD(&fw_cache.fw_names); fw_cache.cnt = 0; + fw_cache.state = FW_LOADER_NO_CACHE; init_waitqueue_head(&fw_cache.wait_queue); INIT_DELAYED_WORK(&fw_cache.work, @@ -1258,6 +1320,8 @@ static void __init fw_cache_init(void) fw_cache.pm_notify.notifier_call = fw_pm_notify; register_pm_notifier(&fw_cache.pm_notify); + + register_syscore_ops(&fw_syscore_ops); } static int __init firmware_class_init(void) @@ -1268,6 +1332,7 @@ static int __init firmware_class_init(void) static void __exit firmware_class_exit(void) { + unregister_syscore_ops(&fw_syscore_ops); unregister_pm_notifier(&fw_cache.pm_notify); class_unregister(&firmware_class); } -- GitLab From b19467b4c9f855ac61959c1dadafdf6738312014 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 8 Sep 2012 17:32:30 +0800 Subject: [PATCH 024/139] firmware loader: fix compile warning when CONFIG_PM=n This patch replaces the previous macro of CONFIG_PM with CONFIG_PM_SLEEP becasue firmware cache is only used in system sleep situations. Also this patch fixes the below compile warning when CONFIG_PM=n: drivers/base/firmware_class.c:1147: warning: 'device_cache_fw_images' defined but not used drivers/base/firmware_class.c:1212: warning: 'device_uncache_fw_images_delay' defined but not used Reported-by: Andrew Morton Signed-off-by: Ming Lei Signed-off-by: Greg Kroah-Hartman --- drivers/base/firmware_class.c | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 95f6851b3010..6e210802c37b 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -96,7 +96,9 @@ struct firmware_cache { /* firmware_buf instance will be added into the below list */ spinlock_t lock; struct list_head head; + int state; +#ifdef CONFIG_PM_SLEEP /* * Names of firmware images which have been cached successfully * will be added into the below list so that device uncache @@ -106,13 +108,12 @@ struct firmware_cache { spinlock_t name_lock; struct list_head fw_names; - int state; - wait_queue_head_t wait_queue; int cnt; struct delayed_work work; struct notifier_block pm_notify; +#endif }; struct firmware_buf { @@ -622,6 +623,7 @@ static void fw_set_page_data(struct firmware_buf *buf, struct firmware *fw) (unsigned int)buf->size); } +#ifdef CONFIG_PM_SLEEP static void fw_name_devm_release(struct device *dev, void *res) { struct fw_name_devm *fwn = res; @@ -670,6 +672,12 @@ static int fw_add_devm_name(struct device *dev, const char *name) return 0; } +#else +static int fw_add_devm_name(struct device *dev, const char *name) +{ + return 0; +} +#endif static void _request_firmware_cleanup(const struct firmware **firmware_p) { @@ -1046,6 +1054,7 @@ int uncache_firmware(const char *fw_name) return -EINVAL; } +#ifdef CONFIG_PM_SLEEP static struct fw_cache_entry *alloc_fw_cache_entry(const char *name) { struct fw_cache_entry *fce; @@ -1258,7 +1267,6 @@ static void device_uncache_fw_images_delay(unsigned long delay) msecs_to_jiffies(delay)); } -#ifdef CONFIG_PM static int fw_pm_notify(struct notifier_block *notify_block, unsigned long mode, void *unused) { @@ -1285,13 +1293,6 @@ static int fw_pm_notify(struct notifier_block *notify_block, return 0; } -#else -static int fw_pm_notify(struct notifier_block *notify_block, - unsigned long mode, void *unused) -{ - return 0; -} -#endif /* stop caching firmware once syscore_suspend is reached */ static int fw_suspend(void) @@ -1303,16 +1304,23 @@ static int fw_suspend(void) static struct syscore_ops fw_syscore_ops = { .suspend = fw_suspend, }; +#else +static int fw_cache_piggyback_on_request(const char *name) +{ + return 0; +} +#endif static void __init fw_cache_init(void) { spin_lock_init(&fw_cache.lock); INIT_LIST_HEAD(&fw_cache.head); + fw_cache.state = FW_LOADER_NO_CACHE; +#ifdef CONFIG_PM_SLEEP spin_lock_init(&fw_cache.name_lock); INIT_LIST_HEAD(&fw_cache.fw_names); fw_cache.cnt = 0; - fw_cache.state = FW_LOADER_NO_CACHE; init_waitqueue_head(&fw_cache.wait_queue); INIT_DELAYED_WORK(&fw_cache.work, @@ -1322,6 +1330,7 @@ static void __init fw_cache_init(void) register_pm_notifier(&fw_cache.pm_notify); register_syscore_ops(&fw_syscore_ops); +#endif } static int __init firmware_class_init(void) @@ -1332,8 +1341,10 @@ static int __init firmware_class_init(void) static void __exit firmware_class_exit(void) { +#ifdef CONFIG_PM_SLEEP unregister_syscore_ops(&fw_syscore_ops); unregister_pm_notifier(&fw_cache.pm_notify); +#endif class_unregister(&firmware_class); } -- GitLab From 38988ea21e6e995830512287b918adc6755b7123 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Wed, 3 Oct 2012 15:58:32 -0700 Subject: [PATCH 025/139] firmware: teach the kernel to load firmware files directly from the filesystem This is a first step in allowing people to by-pass udev for loading device firmware. Current versions of udev will deadlock (causing us to block for the 30 second timeout) under some circumstances if the firmware is loaded as part of the module initialization path, and this is causing problems for media drivers in particular. The current patch hardcodes the firmware path that udev uses by default, and will fall back to the legacy udev mode if the firmware cannot be found there. We'd like to add support for both configuring the paths and the fallback behaviour, but in the meantime this hopefully fixes the immediate problem, while also giving us a way forward. [ v2: Some VFS layer interface cleanups suggested by Al Viro ] [ v3: use the default udev paths suggested by Kay Sievers ] Suggested-by: Ivan Kalvachev Acked-by: Greg KH Acked-by: Al Viro Cc: Mauro Carvalho Chehab Cc: Kay Sievers Cc: Ming Lei Signed-off-by: Linus Torvalds --- drivers/base/firmware_class.c | 78 ++++++++++++++++++++++++++++++++++- 1 file changed, 77 insertions(+), 1 deletion(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 6e210802c37b..e85763de928f 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -21,18 +21,85 @@ #include #include #include +#include #include #include #include #include #include +#include + #include "base.h" MODULE_AUTHOR("Manuel Estrada Sainz"); MODULE_DESCRIPTION("Multi purpose firmware loading support"); MODULE_LICENSE("GPL"); +static const char *fw_path[] = { + "/lib/firmware/updates/" UTS_RELEASE, + "/lib/firmware/updates", + "/lib/firmware/" UTS_RELEASE, + "/lib/firmware" +}; + +/* Don't inline this: 'struct kstat' is biggish */ +static noinline long fw_file_size(struct file *file) +{ + struct kstat st; + if (vfs_getattr(file->f_path.mnt, file->f_path.dentry, &st)) + return -1; + if (!S_ISREG(st.mode)) + return -1; + if (st.size != (long)st.size) + return -1; + return st.size; +} + +static bool fw_read_file_contents(struct file *file, struct firmware *fw) +{ + loff_t pos; + long size; + char *buf; + + size = fw_file_size(file); + if (size < 0) + return false; + buf = vmalloc(size); + if (!buf) + return false; + pos = 0; + if (vfs_read(file, buf, size, &pos) != size) { + vfree(buf); + return false; + } + fw->data = buf; + fw->size = size; + return true; +} + +static bool fw_get_filesystem_firmware(struct firmware *fw, const char *name) +{ + int i; + bool success = false; + char *path = __getname(); + + for (i = 0; i < ARRAY_SIZE(fw_path); i++) { + struct file *file; + snprintf(path, PATH_MAX, "%s/%s", fw_path[i], name); + + file = filp_open(path, O_RDONLY, 0); + if (IS_ERR(file)) + continue; + success = fw_read_file_contents(file, fw); + fput(file); + if (success) + break; + } + __putname(path); + return success; +} + /* Builtin firmware support */ #ifdef CONFIG_FW_LOADER @@ -346,7 +413,11 @@ static ssize_t firmware_loading_show(struct device *dev, /* firmware holds the ownership of pages */ static void firmware_free_data(const struct firmware *fw) { - WARN_ON(!fw->priv); + /* Loaded directly? */ + if (!fw->priv) { + vfree(fw->data); + return; + } fw_free_buf(fw->priv); } @@ -709,6 +780,11 @@ _request_firmware_prepare(const struct firmware **firmware_p, const char *name, return NULL; } + if (fw_get_filesystem_firmware(firmware, name)) { + dev_dbg(device, "firmware: direct-loading firmware %s\n", name); + return NULL; + } + ret = fw_lookup_and_allocate_buf(name, &fw_cache, &buf); if (!ret) fw_priv = fw_create_instance(firmware, name, device, -- GitLab From df9ef93f1505571eabba076143990bca556ab23c Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Thu, 4 Oct 2012 09:19:02 -0700 Subject: [PATCH 026/139] firmware: use 'kernel_read()' to read firmware into kernel buffer Fengguang correctly points out that the firmware reading should not use vfs_read(), since the buffer is in kernel space. The vfs_read() just happened to work for kernel threads, but sparse warns about the incorrect address spaces, and it's definitely incorrect and could fail for other users of the firmware loading. Reported-by: Fengguang Wu Signed-off-by: Linus Torvalds --- drivers/base/firmware_class.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index e85763de928f..81541452887b 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -58,7 +58,6 @@ static noinline long fw_file_size(struct file *file) static bool fw_read_file_contents(struct file *file, struct firmware *fw) { - loff_t pos; long size; char *buf; @@ -68,8 +67,7 @@ static bool fw_read_file_contents(struct file *file, struct firmware *fw) buf = vmalloc(size); if (!buf) return false; - pos = 0; - if (vfs_read(file, buf, size, &pos) != size) { + if (kernel_read(file, 0, buf, size) != size) { vfree(buf); return false; } -- GitLab From 3f2417db10b2941a652fa194d99df5283620198a Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Mon, 24 Jun 2013 17:45:10 -0400 Subject: [PATCH 027/139] msm: hack and slash through the tangled thicket of FB_MSM --- arch/arm/mach-msm/board-8930-display.c | 9 ++++++--- arch/arm/mach-msm/board-8930-gpiomux.c | 6 +++--- arch/arm/mach-msm/board-8960-display.c | 10 +++++++--- arch/arm/mach-msm/board-8960-gpiomux.c | 6 +++--- arch/arm/mach-msm/board-msm8x60.c | 6 +++--- arch/arm/mach-msm/devices.h | 4 ++++ arch/arm/mach-msm/include/mach/msm_hdmi_audio.h | 5 ++++- 7 files changed, 30 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-msm/board-8930-display.c b/arch/arm/mach-msm/board-8930-display.c index d48c20a6fb5c..99efdbd25c4c 100644 --- a/arch/arm/mach-msm/board-8930-display.c +++ b/arch/arm/mach-msm/board-8930-display.c @@ -541,7 +541,7 @@ static struct platform_device mipi_dsi_novatek_panel_device = { } }; -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) static struct resource hdmi_msm_resources[] = { { .name = "hdmi_msm_qfprom_addr", @@ -602,6 +602,7 @@ static struct platform_device wfd_device = { }; #endif +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) #ifdef CONFIG_MSM_BUS_SCALING static struct msm_bus_vectors dtv_bus_init_vectors[] = { { @@ -654,7 +655,6 @@ static struct lcdc_platform_data dtv_pdata = { }; #endif -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL static int hdmi_enable_5v(int on) { static struct regulator *reg_ext_5v; /* HDMI_5V */ @@ -850,7 +850,7 @@ void __init msm8930_init_fb(void) platform_device_register(&mipi_dsi_novatek_panel_device); -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) platform_device_register(&hdmi_msm_device); #endif @@ -858,9 +858,11 @@ void __init msm8930_init_fb(void) msm_fb_register_device("mdp", &mdp_pdata); msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata); +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) #ifdef CONFIG_MSM_BUS_SCALING msm_fb_register_device("dtv", &dtv_pdata); #endif +#endif } void __init msm8930_allocate_fb_region(void) @@ -875,3 +877,4 @@ void __init msm8930_allocate_fb_region(void) pr_info("allocating %lu bytes at %p (%lx physical) for fb\n", size, addr, __pa(addr)); } + diff --git a/arch/arm/mach-msm/board-8930-gpiomux.c b/arch/arm/mach-msm/board-8930-gpiomux.c index dcae37c58fde..259d5a55ffb2 100644 --- a/arch/arm/mach-msm/board-8930-gpiomux.c +++ b/arch/arm/mach-msm/board-8930-gpiomux.c @@ -335,7 +335,7 @@ static struct gpiomux_setting mdp_vsync_active_cfg = { .pull = GPIOMUX_PULL_DOWN, }; -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) static struct gpiomux_setting hdmi_suspend_cfg = { .func = GPIOMUX_FUNC_GPIO, .drv = GPIOMUX_DRV_2MA, @@ -810,7 +810,7 @@ static struct msm_gpiomux_config msm8960_mdp_vsync_configs[] __initdata = { } }; -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) static struct msm_gpiomux_config msm8960_hdmi_configs[] __initdata = { { .gpio = 99, @@ -1160,7 +1160,7 @@ int __init msm8930_init_gpiomux(void) msm_gpiomux_install(msm8930_haptics_configs, ARRAY_SIZE(msm8930_haptics_configs)); -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) msm_gpiomux_install(msm8960_hdmi_configs, ARRAY_SIZE(msm8960_hdmi_configs)); if (machine_is_msm8930_fluid()) diff --git a/arch/arm/mach-msm/board-8960-display.c b/arch/arm/mach-msm/board-8960-display.c index ada557d0b43a..fb8abc2efd89 100644 --- a/arch/arm/mach-msm/board-8960-display.c +++ b/arch/arm/mach-msm/board-8960-display.c @@ -679,7 +679,7 @@ static struct platform_device mipi_dsi_orise_panel_device = { .id = 0, }; -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) static struct resource hdmi_msm_resources[] = { { .name = "hdmi_msm_qfprom_addr", @@ -740,6 +740,7 @@ static struct platform_device wfd_device = { }; #endif +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) #ifdef CONFIG_MSM_BUS_SCALING static struct msm_bus_vectors dtv_bus_init_vectors[] = { { @@ -781,7 +782,6 @@ static struct lcdc_platform_data dtv_pdata = { }; #endif -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL static int hdmi_enable_5v(int on) { /* TBD: PM8921 regulator instead of 8901 */ @@ -1012,7 +1012,7 @@ void __init msm8960_init_fb(void) platform_device_register(&mipi_dsi_novatek_panel_device); platform_device_register(&mipi_dsi_orise_panel_device); -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) platform_device_register(&hdmi_msm_device); #endif @@ -1023,9 +1023,11 @@ void __init msm8960_init_fb(void) msm_fb_register_device("mdp", &mdp_pdata); msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata); +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) #ifdef CONFIG_MSM_BUS_SCALING msm_fb_register_device("dtv", &dtv_pdata); #endif +#endif } void __init msm8960_allocate_fb_region(void) @@ -1056,10 +1058,12 @@ static void set_mdp_clocks_for_wuxga(void) mdp_1080p_vectors[0].ab = 2000000000; mdp_1080p_vectors[0].ib = 2000000000; +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) if (hdmi_is_primary) { dtv_bus_def_vectors[0].ab = 2000000000; dtv_bus_def_vectors[0].ib = 2000000000; } +#endif } void __init msm8960_set_display_params(char *prim_panel, char *ext_panel) diff --git a/arch/arm/mach-msm/board-8960-gpiomux.c b/arch/arm/mach-msm/board-8960-gpiomux.c index e6e676c27db5..bf11afc85043 100644 --- a/arch/arm/mach-msm/board-8960-gpiomux.c +++ b/arch/arm/mach-msm/board-8960-gpiomux.c @@ -283,7 +283,7 @@ static struct gpiomux_setting mdp_vsync_active_cfg = { .pull = GPIOMUX_PULL_DOWN, }; -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) static struct gpiomux_setting hdmi_suspend_cfg = { .func = GPIOMUX_FUNC_GPIO, .drv = GPIOMUX_DRV_2MA, @@ -879,7 +879,7 @@ static struct msm_gpiomux_config msm8960_mdp_vsync_configs[] __initdata = { } }; -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) static struct msm_gpiomux_config msm8960_hdmi_configs[] __initdata = { { .gpio = 99, @@ -1081,7 +1081,7 @@ int __init msm8960_init_gpiomux(void) ARRAY_SIZE(msm8960_hsic_hub_configs)); #endif -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) msm_gpiomux_install(msm8960_hdmi_configs, ARRAY_SIZE(msm8960_hdmi_configs)); #endif diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index f2f41cf63082..14b1c0c3f678 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c @@ -3052,7 +3052,7 @@ static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = { }; #endif -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) static struct resource hdmi_msm_resources[] = { { .name = "hdmi_msm_qfprom_addr", @@ -5195,7 +5195,7 @@ static struct platform_device *surf_devices[] __initdata = { #ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA &lcdc_auo_wvga_panel_device, #endif -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) &hdmi_msm_device, #endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */ #ifdef CONFIG_FB_MSM_MIPI_DSI @@ -8885,7 +8885,7 @@ static void lcdc_samsung_panel_power(int on) mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */ } -#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL +#if defined(CONFIG_FB_MSM_HDMI_MSM_PANEL) || defined(CONFIG_DRM_MSM) #define _GET_REGULATOR(var, name) do { \ var = regulator_get(NULL, name); \ if (IS_ERR(var)) { \ diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h index 46cd4f3b1507..e73403b7d635 100644 --- a/arch/arm/mach-msm/devices.h +++ b/arch/arm/mach-msm/devices.h @@ -27,7 +27,11 @@ void __init msm_map_msm9615_io(void); void __init msm9615_init_irq(void); void __init msm_rotator_update_bus_vectors(unsigned int xres, unsigned int yres); +#ifdef CONFIG_MSM_ROTATOR void __init msm_rotator_set_split_iommu_domain(void); +#else +static inline void msm_rotator_set_split_iommu_domain(void) {}; +#endif extern struct platform_device asoc_msm_pcm; extern struct platform_device asoc_msm_dai0; diff --git a/arch/arm/mach-msm/include/mach/msm_hdmi_audio.h b/arch/arm/mach-msm/include/mach/msm_hdmi_audio.h index 28ba9feccba4..75d56160350f 100644 --- a/arch/arm/mach-msm/include/mach/msm_hdmi_audio.h +++ b/arch/arm/mach-msm/include/mach/msm_hdmi_audio.h @@ -34,12 +34,12 @@ enum hdmi_supported_sample_rates { int hdmi_audio_enable(bool on , u32 fifo_water_mark); int hdmi_audio_packet_enable(bool on); -void hdmi_msm_audio_sample_rate_reset(int rate); int hdmi_msm_audio_get_sample_rate(void); #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL int hdmi_msm_audio_info_setup(bool enabled, u32 num_of_channels, u32 channel_allocation, u32 level_shift, bool down_mix); +void hdmi_msm_audio_sample_rate_reset(int rate); #else static inline int hdmi_msm_audio_info_setup(bool enabled, u32 num_of_channels, u32 channel_allocation, u32 level_shift, @@ -47,5 +47,8 @@ static inline int hdmi_msm_audio_info_setup(bool enabled, { return 0; } +static inline void hdmi_msm_audio_sample_rate_reset(int rate) +{ +} #endif #endif /* __MSM_HDMI_AUDIO_H*/ -- GitLab From 332e99a235ac26d660e054da9dd2f753835fae49 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Mon, 24 Jun 2013 14:49:36 -0400 Subject: [PATCH 028/139] backport drm from 3.10-rc7 Sync to commit: commit 9e895ace5d82df8929b16f58e9f515f6d54ab82d Author: Linus Torvalds AuthorDate: Sat Jun 22 09:47:31 2013 -1000 Commit: Linus Torvalds CommitDate: Sat Jun 22 09:47:31 2013 -1000 Linux 3.10-rc7 Signed-off-by: Rob Clark --- Makefile | 1 + drivers/base/dma-buf.c | 285 +- drivers/gpu/drm/Kconfig | 34 + drivers/gpu/drm/Makefile | 14 +- drivers/gpu/drm/ast/Kconfig | 16 + drivers/gpu/drm/ast/Makefile | 9 + drivers/gpu/drm/ast/ast_dram_tables.h | 144 + drivers/gpu/drm/ast/ast_drv.c | 245 + drivers/gpu/drm/ast/ast_drv.h | 359 + drivers/gpu/drm/ast/ast_fb.c | 368 + drivers/gpu/drm/ast/ast_main.c | 519 + drivers/gpu/drm/ast/ast_mode.c | 1160 ++ drivers/gpu/drm/ast/ast_post.c | 1780 +++ drivers/gpu/drm/ast/ast_tables.h | 265 + drivers/gpu/drm/ast/ast_ttm.c | 453 + drivers/gpu/drm/ati_pcigart.c | 2 +- drivers/gpu/drm/cirrus/Kconfig | 12 + drivers/gpu/drm/cirrus/Makefile | 5 + drivers/gpu/drm/cirrus/cirrus_drv.c | 138 + drivers/gpu/drm/cirrus/cirrus_drv.h | 247 + drivers/gpu/drm/cirrus/cirrus_fbdev.c | 331 + drivers/gpu/drm/cirrus/cirrus_main.c | 326 + drivers/gpu/drm/cirrus/cirrus_mode.c | 628 ++ drivers/gpu/drm/cirrus/cirrus_ttm.c | 458 + drivers/gpu/drm/drm_agpsupport.c | 2 +- drivers/gpu/drm/drm_auth.c | 2 +- drivers/gpu/drm/drm_buffer.c | 2 +- drivers/gpu/drm/drm_bufs.c | 18 +- drivers/gpu/drm/drm_cache.c | 52 +- drivers/gpu/drm/drm_context.c | 13 +- drivers/gpu/drm/drm_crtc.c | 1911 ++-- drivers/gpu/drm/drm_crtc_helper.c | 234 +- drivers/gpu/drm/drm_debugfs.c | 3 +- drivers/gpu/drm/drm_dma.c | 7 +- .../{drm_dp_i2c_helper.c => drm_dp_helper.c} | 150 +- drivers/gpu/drm/drm_drv.c | 67 +- drivers/gpu/drm/drm_edid.c | 1491 ++- drivers/gpu/drm/drm_edid_load.c | 74 +- drivers/gpu/drm/drm_edid_modes.h | 664 -- drivers/gpu/drm/drm_encoder_slave.c | 71 +- drivers/gpu/drm/drm_fb_cma_helper.c | 455 + drivers/gpu/drm/drm_fb_helper.c | 429 +- drivers/gpu/drm/drm_fops.c | 115 +- drivers/gpu/drm/drm_gem.c | 41 +- drivers/gpu/drm/drm_gem_cma_helper.c | 272 + drivers/gpu/drm/drm_global.c | 2 +- drivers/gpu/drm/drm_hashtab.c | 4 +- drivers/gpu/drm/drm_info.c | 44 +- drivers/gpu/drm/drm_ioc32.c | 4 +- drivers/gpu/drm/drm_ioctl.c | 15 +- drivers/gpu/drm/drm_irq.c | 170 +- drivers/gpu/drm/drm_lock.c | 8 +- drivers/gpu/drm/drm_memory.c | 2 +- drivers/gpu/drm/drm_mm.c | 353 +- drivers/gpu/drm/drm_modes.c | 107 +- drivers/gpu/drm/drm_pci.c | 55 +- drivers/gpu/drm/drm_platform.c | 3 +- drivers/gpu/drm/drm_prime.c | 308 +- drivers/gpu/drm/drm_proc.c | 7 +- drivers/gpu/drm/drm_scatter.c | 2 +- drivers/gpu/drm/drm_stub.c | 48 +- drivers/gpu/drm/drm_sysfs.c | 26 +- drivers/gpu/drm/drm_trace_points.c | 2 +- drivers/gpu/drm/drm_usb.c | 4 +- drivers/gpu/drm/drm_vm.c | 32 +- drivers/gpu/drm/exynos/Kconfig | 48 +- drivers/gpu/drm/exynos/Makefile | 7 + drivers/gpu/drm/exynos/exynos_ddc.c | 28 +- drivers/gpu/drm/exynos/exynos_drm_buf.c | 183 +- drivers/gpu/drm/exynos/exynos_drm_buf.h | 26 +- drivers/gpu/drm/exynos/exynos_drm_connector.c | 109 +- drivers/gpu/drm/exynos/exynos_drm_connector.h | 26 +- drivers/gpu/drm/exynos/exynos_drm_core.c | 129 +- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 376 +- drivers/gpu/drm/exynos/exynos_drm_crtc.h | 50 +- drivers/gpu/drm/exynos/exynos_drm_dmabuf.c | 308 + drivers/gpu/drm/exynos/exynos_drm_dmabuf.h | 25 + drivers/gpu/drm/exynos/exynos_drm_drv.c | 208 +- drivers/gpu/drm/exynos/exynos_drm_drv.h | 112 +- drivers/gpu/drm/exynos/exynos_drm_encoder.c | 285 +- drivers/gpu/drm/exynos/exynos_drm_encoder.h | 35 +- drivers/gpu/drm/exynos/exynos_drm_fb.c | 217 +- drivers/gpu/drm/exynos/exynos_drm_fb.h | 42 +- drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 163 +- drivers/gpu/drm/exynos/exynos_drm_fbdev.h | 22 +- drivers/gpu/drm/exynos/exynos_drm_fimc.c | 1982 ++++ drivers/gpu/drm/exynos/exynos_drm_fimc.h | 23 + drivers/gpu/drm/exynos/exynos_drm_fimd.c | 420 +- drivers/gpu/drm/exynos/exynos_drm_g2d.c | 1540 +++ drivers/gpu/drm/exynos/exynos_drm_g2d.h | 36 + drivers/gpu/drm/exynos/exynos_drm_gem.c | 608 +- drivers/gpu/drm/exynos/exynos_drm_gem.h | 96 +- drivers/gpu/drm/exynos/exynos_drm_gsc.c | 1830 ++++ drivers/gpu/drm/exynos/exynos_drm_gsc.h | 24 + drivers/gpu/drm/exynos/exynos_drm_hdmi.c | 256 +- drivers/gpu/drm/exynos/exynos_drm_hdmi.h | 44 +- drivers/gpu/drm/exynos/exynos_drm_iommu.c | 136 + drivers/gpu/drm/exynos/exynos_drm_iommu.h | 71 + drivers/gpu/drm/exynos/exynos_drm_ipp.c | 2067 ++++ drivers/gpu/drm/exynos/exynos_drm_ipp.h | 252 + drivers/gpu/drm/exynos/exynos_drm_plane.c | 296 +- drivers/gpu/drm/exynos/exynos_drm_plane.h | 12 +- drivers/gpu/drm/exynos/exynos_drm_rotator.c | 830 ++ drivers/gpu/drm/exynos/exynos_drm_rotator.h | 19 + drivers/gpu/drm/exynos/exynos_drm_vidi.c | 174 +- drivers/gpu/drm/exynos/exynos_drm_vidi.h | 22 +- drivers/gpu/drm/exynos/exynos_hdmi.c | 2204 ++-- drivers/gpu/drm/exynos/exynos_hdmi.h | 22 +- drivers/gpu/drm/exynos/exynos_hdmiphy.c | 18 +- drivers/gpu/drm/exynos/exynos_mixer.c | 889 +- drivers/gpu/drm/exynos/regs-fimc.h | 668 ++ drivers/gpu/drm/exynos/regs-gsc.h | 284 + drivers/gpu/drm/exynos/regs-hdmi.h | 28 +- drivers/gpu/drm/exynos/regs-mixer.h | 3 + drivers/gpu/drm/exynos/regs-rotator.h | 73 + drivers/gpu/drm/gma500/Kconfig | 15 +- drivers/gpu/drm/gma500/Makefile | 10 +- drivers/gpu/drm/gma500/backlight.c | 45 + drivers/gpu/drm/gma500/cdv_device.c | 306 +- drivers/gpu/drm/gma500/cdv_intel_crt.c | 33 +- drivers/gpu/drm/gma500/cdv_intel_display.c | 899 +- drivers/gpu/drm/gma500/cdv_intel_dp.c | 1951 ++++ drivers/gpu/drm/gma500/cdv_intel_hdmi.c | 22 +- drivers/gpu/drm/gma500/cdv_intel_lvds.c | 100 +- drivers/gpu/drm/gma500/framebuffer.c | 122 +- drivers/gpu/drm/gma500/gem.c | 13 +- drivers/gpu/drm/gma500/gem_glue.c | 90 - drivers/gpu/drm/gma500/gem_glue.h | 2 - drivers/gpu/drm/gma500/gtt.c | 84 +- drivers/gpu/drm/gma500/gtt.h | 2 +- drivers/gpu/drm/gma500/intel_bios.c | 382 +- drivers/gpu/drm/gma500/intel_bios.h | 215 +- drivers/gpu/drm/gma500/intel_gmbus.c | 5 +- drivers/gpu/drm/gma500/mdfld_device.c | 452 +- drivers/gpu/drm/gma500/mdfld_dsi_dpi.c | 3 +- drivers/gpu/drm/gma500/mdfld_dsi_dpi.h | 2 +- drivers/gpu/drm/gma500/mdfld_dsi_output.c | 32 +- drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c | 24 +- drivers/gpu/drm/gma500/mdfld_intel_display.c | 334 +- drivers/gpu/drm/gma500/mid_bios.c | 297 +- drivers/gpu/drm/gma500/oaktrail.h | 31 +- drivers/gpu/drm/gma500/oaktrail_crtc.c | 146 +- drivers/gpu/drm/gma500/oaktrail_device.c | 142 +- drivers/gpu/drm/gma500/oaktrail_hdmi.c | 434 +- drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c | 5 +- drivers/gpu/drm/gma500/oaktrail_lvds.c | 12 +- drivers/gpu/drm/gma500/opregion.c | 341 + .../gma500/{intel_opregion.c => opregion.h} | 67 +- drivers/gpu/drm/gma500/power.c | 17 + drivers/gpu/drm/gma500/power.h | 3 + drivers/gpu/drm/gma500/psb_device.c | 82 +- drivers/gpu/drm/gma500/psb_drv.c | 87 +- drivers/gpu/drm/gma500/psb_drv.h | 233 +- drivers/gpu/drm/gma500/psb_intel_display.c | 536 +- drivers/gpu/drm/gma500/psb_intel_display.h | 3 - drivers/gpu/drm/gma500/psb_intel_drv.h | 45 +- drivers/gpu/drm/gma500/psb_intel_lvds.c | 25 +- drivers/gpu/drm/gma500/psb_intel_reg.h | 233 +- drivers/gpu/drm/gma500/psb_intel_sdvo.c | 85 +- drivers/gpu/drm/gma500/psb_irq.c | 38 +- drivers/gpu/drm/gma500/psb_irq.h | 6 +- drivers/gpu/drm/gma500/psb_lid.c | 14 +- drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c | 4 +- drivers/gpu/drm/i2c/Kconfig | 28 + drivers/gpu/drm/i2c/Makefile | 3 + drivers/gpu/drm/i2c/ch7006_drv.c | 40 +- drivers/gpu/drm/i2c/ch7006_mode.c | 2 +- drivers/gpu/drm/i2c/ch7006_priv.h | 10 +- drivers/gpu/drm/i2c/sil164_drv.c | 10 +- drivers/gpu/drm/i2c/tda998x_drv.c | 906 ++ drivers/gpu/drm/i810/i810_dma.c | 29 +- drivers/gpu/drm/i810/i810_drv.c | 13 +- drivers/gpu/drm/i810/i810_drv.h | 6 +- drivers/gpu/drm/i915/Makefile | 10 +- drivers/gpu/drm/i915/dvo.h | 23 +- drivers/gpu/drm/i915/dvo_ch7017.c | 21 +- drivers/gpu/drm/i915/dvo_ch7xxx.c | 17 +- drivers/gpu/drm/i915/dvo_ivch.c | 23 +- drivers/gpu/drm/i915/dvo_ns2501.c | 588 + drivers/gpu/drm/i915/dvo_sil164.c | 20 +- drivers/gpu/drm/i915/dvo_tfp410.c | 18 +- drivers/gpu/drm/i915/i915_debugfs.c | 1037 +- drivers/gpu/drm/i915/i915_dma.c | 1462 +-- drivers/gpu/drm/i915/i915_drv.c | 780 +- drivers/gpu/drm/i915/i915_drv.h | 1342 ++- drivers/gpu/drm/i915/i915_gem.c | 3783 ++++--- drivers/gpu/drm/i915/i915_gem_context.c | 521 + drivers/gpu/drm/i915/i915_gem_debug.c | 24 +- drivers/gpu/drm/i915/i915_gem_dmabuf.c | 308 + drivers/gpu/drm/i915/i915_gem_evict.c | 82 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 1048 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 881 +- drivers/gpu/drm/i915/i915_gem_stolen.c | 387 + drivers/gpu/drm/i915/i915_gem_tiling.c | 100 +- drivers/gpu/drm/i915/i915_ioc32.c | 10 +- drivers/gpu/drm/i915/i915_irq.c | 2876 +++-- drivers/gpu/drm/i915/i915_reg.h | 1678 ++- drivers/gpu/drm/i915/i915_suspend.c | 815 +- drivers/gpu/drm/i915/i915_sysfs.c | 408 + drivers/gpu/drm/i915/i915_trace.h | 63 +- drivers/gpu/drm/i915/i915_trace_points.c | 2 + drivers/gpu/drm/i915/i915_ums.c | 503 + drivers/gpu/drm/i915/intel_acpi.c | 5 +- drivers/gpu/drm/i915/intel_bios.c | 75 +- drivers/gpu/drm/i915/intel_bios.h | 8 +- drivers/gpu/drm/i915/intel_crt.c | 385 +- drivers/gpu/drm/i915/intel_ddi.c | 1560 +++ drivers/gpu/drm/i915/intel_display.c | 9582 +++++++++-------- drivers/gpu/drm/i915/intel_dp.c | 2047 ++-- drivers/gpu/drm/i915/intel_drv.h | 492 +- drivers/gpu/drm/i915/intel_dvo.c | 142 +- drivers/gpu/drm/i915/intel_fb.c | 94 +- drivers/gpu/drm/i915/intel_hdmi.c | 898 +- drivers/gpu/drm/i915/intel_i2c.c | 472 +- drivers/gpu/drm/i915/intel_lvds.c | 647 +- drivers/gpu/drm/i915/intel_modes.c | 60 +- drivers/gpu/drm/i915/intel_opregion.c | 106 +- drivers/gpu/drm/i915/intel_overlay.c | 370 +- drivers/gpu/drm/i915/intel_panel.c | 251 +- drivers/gpu/drm/i915/intel_pm.c | 4622 ++++++++ drivers/gpu/drm/i915/intel_ringbuffer.c | 1372 ++- drivers/gpu/drm/i915/intel_ringbuffer.h | 99 +- drivers/gpu/drm/i915/intel_sdvo.c | 764 +- drivers/gpu/drm/i915/intel_sdvo_regs.h | 7 + drivers/gpu/drm/i915/intel_sprite.c | 495 +- drivers/gpu/drm/i915/intel_tv.c | 186 +- drivers/gpu/drm/mga/mga_dma.c | 6 +- drivers/gpu/drm/mga/mga_drv.c | 8 +- drivers/gpu/drm/mga/mga_ioc32.c | 5 +- drivers/gpu/drm/mga/mga_irq.c | 5 +- drivers/gpu/drm/mga/mga_state.c | 5 +- drivers/gpu/drm/mga/mga_warp.c | 5 +- drivers/gpu/drm/mgag200/Kconfig | 15 + drivers/gpu/drm/mgag200/Makefile | 5 + drivers/gpu/drm/mgag200/mgag200_drv.c | 139 + drivers/gpu/drm/mgag200/mgag200_drv.h | 276 + drivers/gpu/drm/mgag200/mgag200_fb.c | 314 + drivers/gpu/drm/mgag200/mgag200_i2c.c | 156 + drivers/gpu/drm/mgag200/mgag200_main.c | 362 + drivers/gpu/drm/mgag200/mgag200_mode.c | 1567 +++ drivers/gpu/drm/mgag200/mgag200_reg.h | 661 ++ drivers/gpu/drm/mgag200/mgag200_ttm.c | 452 + drivers/gpu/drm/nouveau/Kconfig | 62 +- drivers/gpu/drm/nouveau/Makefile | 276 +- drivers/gpu/drm/nouveau/core/core/client.c | 112 + drivers/gpu/drm/nouveau/core/core/engctx.c | 251 + drivers/gpu/drm/nouveau/core/core/engine.c | 55 + .../{nouveau_util.c => core/core/enum.c} | 52 +- drivers/gpu/drm/nouveau/core/core/event.c | 110 + drivers/gpu/drm/nouveau/core/core/falcon.c | 250 + drivers/gpu/drm/nouveau/core/core/gpuobj.c | 323 + drivers/gpu/drm/nouveau/core/core/handle.c | 226 + drivers/gpu/drm/nouveau/core/core/mm.c | 251 + drivers/gpu/drm/nouveau/core/core/namedb.c | 203 + drivers/gpu/drm/nouveau/core/core/object.c | 474 + drivers/gpu/drm/nouveau/core/core/option.c | 131 + drivers/gpu/drm/nouveau/core/core/parent.c | 128 + drivers/gpu/drm/nouveau/core/core/printk.c | 74 + drivers/gpu/drm/nouveau/core/core/ramht.c | 109 + drivers/gpu/drm/nouveau/core/core/subdev.c | 115 + .../gpu/drm/nouveau/core/engine/bsp/nv84.c | 93 + .../gpu/drm/nouveau/core/engine/bsp/nvc0.c | 110 + .../gpu/drm/nouveau/core/engine/bsp/nve0.c | 110 + .../engine/copy/fuc/nva3.fuc} | 4 +- .../engine/copy/fuc/nva3.fuc.h} | 94 +- .../engine/copy/fuc/nvc0.fuc.h} | 87 +- .../gpu/drm/nouveau/core/engine/copy/nva3.c | 164 + .../gpu/drm/nouveau/core/engine/copy/nvc0.c | 178 + .../gpu/drm/nouveau/core/engine/copy/nve0.c | 136 + .../nouveau/core/engine/crypt/fuc/nv98.fuc | 698 ++ .../nouveau/core/engine/crypt/fuc/nv98.fuc.h | 584 + .../gpu/drm/nouveau/core/engine/crypt/nv84.c | 197 + .../gpu/drm/nouveau/core/engine/crypt/nv98.c | 165 + .../gpu/drm/nouveau/core/engine/device/base.c | 477 + .../gpu/drm/nouveau/core/engine/device/nv04.c | 89 + .../gpu/drm/nouveau/core/engine/device/nv10.c | 204 + .../gpu/drm/nouveau/core/engine/device/nv20.c | 131 + .../gpu/drm/nouveau/core/engine/device/nv30.c | 153 + .../gpu/drm/nouveau/core/engine/device/nv40.c | 393 + .../gpu/drm/nouveau/core/engine/device/nv50.c | 425 + .../gpu/drm/nouveau/core/engine/device/nvc0.c | 320 + .../gpu/drm/nouveau/core/engine/device/nve0.c | 184 + .../gpu/drm/nouveau/core/engine/disp/base.c | 52 + .../drm/nouveau/core/engine/disp/dacnv50.c | 93 + .../gpu/drm/nouveau/core/engine/disp/dport.c | 346 + .../gpu/drm/nouveau/core/engine/disp/dport.h | 78 + .../drm/nouveau/core/engine/disp/hdanva3.c | 48 + .../drm/nouveau/core/engine/disp/hdanvd0.c | 53 + .../drm/nouveau/core/engine/disp/hdminv84.c | 70 + .../drm/nouveau/core/engine/disp/hdminva3.c | 66 + .../drm/nouveau/core/engine/disp/hdminvd0.c | 62 + .../gpu/drm/nouveau/core/engine/disp/nv04.c | 105 + .../gpu/drm/nouveau/core/engine/disp/nv50.c | 1324 +++ .../gpu/drm/nouveau/core/engine/disp/nv50.h | 147 + .../gpu/drm/nouveau/core/engine/disp/nv84.c | 102 + .../gpu/drm/nouveau/core/engine/disp/nv94.c | 103 + .../gpu/drm/nouveau/core/engine/disp/nva0.c | 89 + .../gpu/drm/nouveau/core/engine/disp/nva3.c | 105 + .../gpu/drm/nouveau/core/engine/disp/nvd0.c | 994 ++ .../gpu/drm/nouveau/core/engine/disp/nve0.c | 89 + .../gpu/drm/nouveau/core/engine/disp/nvf0.c | 89 + .../drm/nouveau/core/engine/disp/piornv50.c | 140 + .../drm/nouveau/core/engine/disp/sornv50.c | 87 + .../drm/nouveau/core/engine/disp/sornv94.c | 127 + .../drm/nouveau/core/engine/disp/sornvd0.c | 124 + .../gpu/drm/nouveau/core/engine/disp/vga.c | 215 + .../gpu/drm/nouveau/core/engine/dmaobj/base.c | 120 + .../gpu/drm/nouveau/core/engine/dmaobj/nv04.c | 143 + .../gpu/drm/nouveau/core/engine/dmaobj/nv50.c | 161 + .../gpu/drm/nouveau/core/engine/dmaobj/nvc0.c | 143 + .../gpu/drm/nouveau/core/engine/dmaobj/nvd0.c | 125 + .../gpu/drm/nouveau/core/engine/fifo/base.c | 208 + .../gpu/drm/nouveau/core/engine/fifo/nv04.c | 644 ++ .../gpu/drm/nouveau/core/engine/fifo/nv04.h | 178 + .../gpu/drm/nouveau/core/engine/fifo/nv10.c | 171 + .../gpu/drm/nouveau/core/engine/fifo/nv17.c | 208 + .../gpu/drm/nouveau/core/engine/fifo/nv40.c | 349 + .../gpu/drm/nouveau/core/engine/fifo/nv50.c | 515 + .../gpu/drm/nouveau/core/engine/fifo/nv50.h | 36 + .../gpu/drm/nouveau/core/engine/fifo/nv84.c | 442 + .../gpu/drm/nouveau/core/engine/fifo/nvc0.c | 733 ++ .../gpu/drm/nouveau/core/engine/fifo/nve0.c | 679 ++ .../engine/graph/ctx.h} | 30 +- .../engine/graph/ctxnv40.c} | 159 +- .../engine/graph/ctxnv50.c} | 572 +- .../drm/nouveau/core/engine/graph/ctxnvc0.c | 3038 ++++++ .../drm/nouveau/core/engine/graph/ctxnve0.c | 2793 +++++ .../engine/graph/fuc/gpcnvc0.fuc} | 13 +- .../engine/graph/fuc/gpcnvc0.fuc.h} | 66 + .../nouveau/core/engine/graph/fuc/gpcnve0.fuc | 456 + .../core/engine/graph/fuc/gpcnve0.fuc.h | 533 + .../engine/graph/fuc/hubnvc0.fuc} | 21 +- .../engine/graph/fuc/hubnvc0.fuc.h} | 222 +- .../nouveau/core/engine/graph/fuc/hubnve0.fuc | 793 ++ .../core/engine/graph/fuc/hubnve0.fuc.h | 858 ++ .../engine/graph/fuc/nvc0.fuc} | 0 .../nouveau/core/engine/graph/fuc/nve0.fuc | 400 + .../gpu/drm/nouveau/core/engine/graph/nv04.c | 1389 +++ .../gpu/drm/nouveau/core/engine/graph/nv10.c | 1316 +++ .../gpu/drm/nouveau/core/engine/graph/nv20.c | 384 + .../gpu/drm/nouveau/core/engine/graph/nv20.h | 31 + .../gpu/drm/nouveau/core/engine/graph/nv25.c | 167 + .../gpu/drm/nouveau/core/engine/graph/nv2a.c | 134 + .../gpu/drm/nouveau/core/engine/graph/nv30.c | 238 + .../gpu/drm/nouveau/core/engine/graph/nv34.c | 168 + .../gpu/drm/nouveau/core/engine/graph/nv35.c | 166 + .../gpu/drm/nouveau/core/engine/graph/nv40.c | 537 + .../gpu/drm/nouveau/core/engine/graph/nv40.h | 21 + .../gpu/drm/nouveau/core/engine/graph/nv50.c | 966 ++ .../gpu/drm/nouveau/core/engine/graph/nv50.h | 7 + .../gpu/drm/nouveau/core/engine/graph/nvc0.c | 964 ++ .../gpu/drm/nouveau/core/engine/graph/nvc0.h | 175 + .../gpu/drm/nouveau/core/engine/graph/nve0.c | 807 ++ .../gpu/drm/nouveau/core/engine/graph/regs.h | 274 + .../gpu/drm/nouveau/core/engine/mpeg/nv31.c | 311 + .../gpu/drm/nouveau/core/engine/mpeg/nv40.c | 144 + .../gpu/drm/nouveau/core/engine/mpeg/nv50.c | 239 + .../gpu/drm/nouveau/core/engine/mpeg/nv84.c | 104 + .../gpu/drm/nouveau/core/engine/ppp/nv98.c | 98 + .../gpu/drm/nouveau/core/engine/ppp/nvc0.c | 110 + .../drm/nouveau/core/engine/software/nv04.c | 147 + .../drm/nouveau/core/engine/software/nv10.c | 129 + .../drm/nouveau/core/engine/software/nv50.c | 219 + .../drm/nouveau/core/engine/software/nvc0.c | 225 + drivers/gpu/drm/nouveau/core/engine/vp/nv84.c | 93 + drivers/gpu/drm/nouveau/core/engine/vp/nvc0.c | 110 + drivers/gpu/drm/nouveau/core/engine/vp/nve0.c | 110 + .../gpu/drm/nouveau/core/include/core/class.h | 361 + .../drm/nouveau/core/include/core/client.h | 46 + .../gpu/drm/nouveau/core/include/core/debug.h | 13 + .../drm/nouveau/core/include/core/device.h | 137 + .../drm/nouveau/core/include/core/engctx.h | 54 + .../drm/nouveau/core/include/core/engine.h | 57 + .../gpu/drm/nouveau/core/include/core/enum.h | 24 + .../gpu/drm/nouveau/core/include/core/event.h | 36 + .../drm/nouveau/core/include/core/falcon.h | 81 + .../drm/nouveau/core/include/core/gpuobj.h | 71 + .../drm/nouveau/core/include/core/handle.h | 31 + .../gpu/drm/nouveau/core/include/core/math.h | 16 + .../gpu/drm/nouveau/core/include/core/mm.h | 38 + .../drm/nouveau/core/include/core/namedb.h | 56 + .../drm/nouveau/core/include/core/object.h | 202 + .../drm/nouveau/core/include/core/option.h | 11 + .../drm/nouveau/core/include/core/parent.h | 61 + .../drm/nouveau/core/include/core/printk.h | 40 + .../gpu/drm/nouveau/core/include/core/ramht.h | 23 + .../drm/nouveau/core/include/core/subdev.h | 118 + .../gpu/drm/nouveau/core/include/engine/bsp.h | 8 + .../drm/nouveau/core/include/engine/copy.h | 12 + .../drm/nouveau/core/include/engine/crypt.h | 7 + .../drm/nouveau/core/include/engine/device.h | 23 + .../drm/nouveau/core/include/engine/disp.h | 49 + .../drm/nouveau/core/include/engine/dmaobj.h | 48 + .../drm/nouveau/core/include/engine/fifo.h | 116 + .../drm/nouveau/core/include/engine/graph.h | 76 + .../drm/nouveau/core/include/engine/mpeg.h | 61 + .../gpu/drm/nouveau/core/include/engine/ppp.h | 7 + .../nouveau/core/include/engine/software.h | 60 + .../gpu/drm/nouveau/core/include/engine/vp.h | 8 + .../gpu/drm/nouveau/core/include/subdev/bar.h | 55 + .../drm/nouveau/core/include/subdev/bios.h | 35 + .../nouveau/core/include/subdev/bios/bit.h | 13 + .../nouveau/core/include/subdev/bios/bmp.h | 39 + .../nouveau/core/include/subdev/bios/conn.h | 27 + .../nouveau/core/include/subdev/bios/dcb.h | 69 + .../nouveau/core/include/subdev/bios/disp.h | 48 + .../drm/nouveau/core/include/subdev/bios/dp.h | 34 + .../nouveau/core/include/subdev/bios/extdev.h | 30 + .../nouveau/core/include/subdev/bios/gpio.h | 40 + .../nouveau/core/include/subdev/bios/i2c.h | 25 + .../nouveau/core/include/subdev/bios/init.h | 22 + .../nouveau/core/include/subdev/bios/mxm.h | 9 + .../nouveau/core/include/subdev/bios/perf.h | 14 + .../nouveau/core/include/subdev/bios/pll.h | 79 + .../nouveau/core/include/subdev/bios/therm.h | 62 + .../nouveau/core/include/subdev/bios/xpio.h | 19 + .../gpu/drm/nouveau/core/include/subdev/bus.h | 41 + .../drm/nouveau/core/include/subdev/clock.h | 60 + .../drm/nouveau/core/include/subdev/devinit.h | 40 + .../gpu/drm/nouveau/core/include/subdev/fb.h | 171 + .../drm/nouveau/core/include/subdev/gpio.h | 53 + .../gpu/drm/nouveau/core/include/subdev/i2c.h | 151 + .../drm/nouveau/core/include/subdev/ibus.h | 34 + .../drm/nouveau/core/include/subdev/instmem.h | 73 + .../drm/nouveau/core/include/subdev/ltcg.h | 40 + .../gpu/drm/nouveau/core/include/subdev/mc.h | 51 + .../gpu/drm/nouveau/core/include/subdev/mxm.h | 37 + .../drm/nouveau/core/include/subdev/therm.h | 80 + .../drm/nouveau/core/include/subdev/timer.h | 61 + .../gpu/drm/nouveau/core/include/subdev/vga.h | 30 + .../include/subdev/vm.h} | 85 +- drivers/gpu/drm/nouveau/core/os.h | 49 + .../gpu/drm/nouveau/core/subdev/bar/base.c | 135 + .../gpu/drm/nouveau/core/subdev/bar/nv50.c | 265 + .../gpu/drm/nouveau/core/subdev/bar/nvc0.c | 219 + .../gpu/drm/nouveau/core/subdev/bios/base.c | 520 + .../gpu/drm/nouveau/core/subdev/bios/bit.c | 52 + .../gpu/drm/nouveau/core/subdev/bios/conn.c | 56 + .../gpu/drm/nouveau/core/subdev/bios/dcb.c | 204 + .../gpu/drm/nouveau/core/subdev/bios/disp.c | 178 + drivers/gpu/drm/nouveau/core/subdev/bios/dp.c | 204 + .../gpu/drm/nouveau/core/subdev/bios/extdev.c | 100 + .../gpu/drm/nouveau/core/subdev/bios/gpio.c | 150 + .../gpu/drm/nouveau/core/subdev/bios/i2c.c | 134 + .../gpu/drm/nouveau/core/subdev/bios/init.c | 2200 ++++ .../gpu/drm/nouveau/core/subdev/bios/mxm.c | 135 + .../gpu/drm/nouveau/core/subdev/bios/perf.c | 75 + .../gpu/drm/nouveau/core/subdev/bios/pll.c | 415 + .../gpu/drm/nouveau/core/subdev/bios/therm.c | 203 + .../gpu/drm/nouveau/core/subdev/bios/xpio.c | 76 + .../gpu/drm/nouveau/core/subdev/bus/nv04.c | 95 + .../gpu/drm/nouveau/core/subdev/bus/nv31.c | 112 + .../gpu/drm/nouveau/core/subdev/bus/nv50.c | 105 + .../gpu/drm/nouveau/core/subdev/bus/nvc0.c | 101 + .../gpu/drm/nouveau/core/subdev/clock/nv04.c | 359 + .../subdev/clock/nv40.c} | 56 +- .../gpu/drm/nouveau/core/subdev/clock/nv50.c | 106 + .../gpu/drm/nouveau/core/subdev/clock/nva3.c | 114 + .../gpu/drm/nouveau/core/subdev/clock/nvc0.c | 97 + .../gpu/drm/nouveau/core/subdev/clock/pll.h | 9 + .../drm/nouveau/core/subdev/clock/pllnv04.c | 242 + .../subdev/clock/pllnva3.c} | 69 +- .../drm/nouveau/core/subdev/devinit/base.c | 69 + .../drm/nouveau/core/subdev/devinit/fbmem.h | 98 + .../drm/nouveau/core/subdev/devinit/nv04.c | 189 + .../drm/nouveau/core/subdev/devinit/nv05.c | 159 + .../drm/nouveau/core/subdev/devinit/nv10.c | 124 + .../subdev/devinit/nv1a.c} | 65 +- .../drm/nouveau/core/subdev/devinit/nv20.c | 96 + .../drm/nouveau/core/subdev/devinit/nv50.c | 121 + drivers/gpu/drm/nouveau/core/subdev/fb/base.c | 140 + drivers/gpu/drm/nouveau/core/subdev/fb/nv04.c | 134 + drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c | 104 + drivers/gpu/drm/nouveau/core/subdev/fb/nv1a.c | 89 + drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c | 132 + drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c | 81 + drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c | 159 + drivers/gpu/drm/nouveau/core/subdev/fb/nv35.c | 82 + drivers/gpu/drm/nouveau/core/subdev/fb/nv36.c | 82 + drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c | 113 + drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c | 106 + drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c | 114 + drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c | 79 + .../{nouveau_util.h => core/subdev/fb/nv47.c} | 53 +- drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c | 84 + .../{nv50_mc.c => core/subdev/fb/nv4e.c} | 48 +- drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c | 522 + drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c | 247 + .../gpu/drm/nouveau/core/subdev/gpio/base.c | 158 + .../gpu/drm/nouveau/core/subdev/gpio/nv10.c | 177 + .../gpu/drm/nouveau/core/subdev/gpio/nv50.c | 212 + .../gpu/drm/nouveau/core/subdev/gpio/nvd0.c | 107 + .../gpu/drm/nouveau/core/subdev/gpio/nve0.c | 131 + .../gpu/drm/nouveau/core/subdev/gpio/priv.h | 17 + .../gpu/drm/nouveau/core/subdev/i2c/anx9805.c | 279 + drivers/gpu/drm/nouveau/core/subdev/i2c/aux.c | 100 + .../gpu/drm/nouveau/core/subdev/i2c/base.c | 365 + drivers/gpu/drm/nouveau/core/subdev/i2c/bit.c | 232 + .../gpu/drm/nouveau/core/subdev/i2c/nv04.c | 143 + .../gpu/drm/nouveau/core/subdev/i2c/nv4e.c | 135 + .../gpu/drm/nouveau/core/subdev/i2c/nv50.c | 149 + .../gpu/drm/nouveau/core/subdev/i2c/nv50.h | 32 + .../gpu/drm/nouveau/core/subdev/i2c/nv94.c | 285 + .../gpu/drm/nouveau/core/subdev/i2c/nvd0.c | 124 + .../gpu/drm/nouveau/core/subdev/ibus/nvc0.c | 123 + .../gpu/drm/nouveau/core/subdev/ibus/nve0.c | 123 + .../drm/nouveau/core/subdev/instmem/base.c | 154 + .../drm/nouveau/core/subdev/instmem/nv04.c | 190 + .../drm/nouveau/core/subdev/instmem/nv04.h | 38 + .../drm/nouveau/core/subdev/instmem/nv40.c | 140 + .../drm/nouveau/core/subdev/instmem/nv50.c | 172 + .../gpu/drm/nouveau/core/subdev/ltcg/nvc0.c | 221 + drivers/gpu/drm/nouveau/core/subdev/mc/base.c | 101 + drivers/gpu/drm/nouveau/core/subdev/mc/nv04.c | 82 + .../{nv98_crypt.c => core/subdev/mc/nv44.c} | 73 +- drivers/gpu/drm/nouveau/core/subdev/mc/nv50.c | 81 + drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c | 75 + drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c | 77 + .../gpu/drm/nouveau/core/subdev/mxm/base.c | 290 + .../gpu/drm/nouveau/core/subdev/mxm/mxms.c | 193 + .../gpu/drm/nouveau/core/subdev/mxm/mxms.h | 22 + .../gpu/drm/nouveau/core/subdev/mxm/nv50.c | 233 + .../gpu/drm/nouveau/core/subdev/therm/base.c | 336 + .../gpu/drm/nouveau/core/subdev/therm/fan.c | 254 + .../subdev/therm/fannil.c} | 54 +- .../drm/nouveau/core/subdev/therm/fanpwm.c | 107 + .../drm/nouveau/core/subdev/therm/fantog.c | 115 + .../gpu/drm/nouveau/core/subdev/therm/ic.c | 120 + .../gpu/drm/nouveau/core/subdev/therm/nv40.c | 224 + .../gpu/drm/nouveau/core/subdev/therm/nv50.c | 197 + .../gpu/drm/nouveau/core/subdev/therm/nv84.c | 221 + .../gpu/drm/nouveau/core/subdev/therm/nva3.c | 99 + .../gpu/drm/nouveau/core/subdev/therm/nvd0.c | 153 + .../gpu/drm/nouveau/core/subdev/therm/priv.h | 150 + .../gpu/drm/nouveau/core/subdev/therm/temp.c | 245 + .../gpu/drm/nouveau/core/subdev/timer/base.c | 87 + .../gpu/drm/nouveau/core/subdev/timer/nv04.c | 254 + .../{nouveau_vm.c => core/subdev/vm/base.c} | 204 +- drivers/gpu/drm/nouveau/core/subdev/vm/nv04.c | 151 + drivers/gpu/drm/nouveau/core/subdev/vm/nv04.h | 19 + drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c | 159 + drivers/gpu/drm/nouveau/core/subdev/vm/nv44.c | 249 + .../{nv50_vm.c => core/subdev/vm/nv50.c} | 120 +- drivers/gpu/drm/nouveau/core/subdev/vm/nvc0.c | 243 + drivers/gpu/drm/nouveau/dispnv04/Makefile | 10 + .../{nouveau_calc.c => dispnv04/arb.c} | 239 +- .../nouveau/{nv04_crtc.c => dispnv04/crtc.c} | 159 +- .../{nv04_cursor.c => dispnv04/cursor.c} | 15 +- .../nouveau/{nv04_dac.c => dispnv04/dac.c} | 164 +- .../nouveau/{nv04_dfp.c => dispnv04/dfp.c} | 156 +- .../{nv04_display.c => dispnv04/disp.c} | 158 +- drivers/gpu/drm/nouveau/dispnv04/disp.h | 185 + .../nouveau/{nouveau_hw.c => dispnv04/hw.c} | 444 +- .../nouveau/{nouveau_hw.h => dispnv04/hw.h} | 185 +- .../gpu/drm/nouveau/{ => dispnv04}/nvreg.h | 0 .../tvmodesnv17.c} | 13 +- .../nouveau/{nv04_tv.c => dispnv04/tvnv04.c} | 88 +- .../nouveau/{nv17_tv.c => dispnv04/tvnv17.c} | 126 +- .../nouveau/{nv17_tv.h => dispnv04/tvnv17.h} | 6 +- drivers/gpu/drm/nouveau/nouveau_abi16.c | 493 + drivers/gpu/drm/nouveau/nouveau_abi16.h | 115 + drivers/gpu/drm/nouveau/nouveau_acpi.c | 67 +- drivers/gpu/drm/nouveau/nouveau_acpi.h | 26 + drivers/gpu/drm/nouveau/nouveau_agp.c | 164 + drivers/gpu/drm/nouveau/nouveau_agp.h | 10 + drivers/gpu/drm/nouveau/nouveau_backlight.c | 93 +- drivers/gpu/drm/nouveau/nouveau_bios.c | 4963 +-------- drivers/gpu/drm/nouveau/nouveau_bios.h | 191 +- drivers/gpu/drm/nouveau/nouveau_bo.c | 842 +- drivers/gpu/drm/nouveau/nouveau_bo.h | 100 + drivers/gpu/drm/nouveau/nouveau_chan.c | 403 + drivers/gpu/drm/nouveau/nouveau_chan.h | 47 + drivers/gpu/drm/nouveau/nouveau_channel.c | 492 - drivers/gpu/drm/nouveau/nouveau_connector.c | 344 +- drivers/gpu/drm/nouveau/nouveau_connector.h | 31 +- drivers/gpu/drm/nouveau/nouveau_crtc.h | 10 - drivers/gpu/drm/nouveau/nouveau_debugfs.c | 144 +- drivers/gpu/drm/nouveau/nouveau_debugfs.h | 22 + drivers/gpu/drm/nouveau/nouveau_display.c | 339 +- drivers/gpu/drm/nouveau/nouveau_display.h | 91 + drivers/gpu/drm/nouveau/nouveau_dma.c | 56 +- drivers/gpu/drm/nouveau/nouveau_dma.h | 86 +- drivers/gpu/drm/nouveau/nouveau_dp.c | 559 +- drivers/gpu/drm/nouveau/nouveau_drm.c | 799 ++ drivers/gpu/drm/nouveau/nouveau_drm.h | 159 + drivers/gpu/drm/nouveau/nouveau_drv.c | 497 - drivers/gpu/drm/nouveau/nouveau_drv.h | 1793 --- drivers/gpu/drm/nouveau/nouveau_encoder.h | 26 +- drivers/gpu/drm/nouveau/nouveau_fb.h | 47 - drivers/gpu/drm/nouveau/nouveau_fbcon.c | 289 +- drivers/gpu/drm/nouveau/nouveau_fbcon.h | 5 +- drivers/gpu/drm/nouveau/nouveau_fence.c | 639 +- drivers/gpu/drm/nouveau/nouveau_fence.h | 96 + drivers/gpu/drm/nouveau/nouveau_gem.c | 226 +- drivers/gpu/drm/nouveau/nouveau_gem.h | 45 + drivers/gpu/drm/nouveau/nouveau_gpio.c | 400 - drivers/gpu/drm/nouveau/nouveau_gpio.h | 71 - drivers/gpu/drm/nouveau/nouveau_hdmi.c | 260 - drivers/gpu/drm/nouveau/nouveau_i2c.c | 394 - drivers/gpu/drm/nouveau/nouveau_ioc32.c | 5 +- drivers/gpu/drm/nouveau/nouveau_ioctl.h | 6 + drivers/gpu/drm/nouveau/nouveau_irq.c | 151 - drivers/gpu/drm/nouveau/nouveau_mem.c | 747 +- drivers/gpu/drm/nouveau/nouveau_mm.c | 175 - drivers/gpu/drm/nouveau/nouveau_mm.h | 67 - drivers/gpu/drm/nouveau/nouveau_mxm.c | 723 -- drivers/gpu/drm/nouveau/nouveau_notifier.c | 204 - drivers/gpu/drm/nouveau/nouveau_object.c | 1045 -- drivers/gpu/drm/nouveau/nouveau_perf.c | 69 +- drivers/gpu/drm/nouveau/nouveau_pm.c | 727 +- drivers/gpu/drm/nouveau/nouveau_pm.h | 190 +- drivers/gpu/drm/nouveau/nouveau_prime.c | 95 + drivers/gpu/drm/nouveau/nouveau_ramht.c | 309 - drivers/gpu/drm/nouveau/nouveau_sgdma.c | 382 +- drivers/gpu/drm/nouveau/nouveau_state.c | 1449 --- drivers/gpu/drm/nouveau/nouveau_temp.c | 331 - drivers/gpu/drm/nouveau/nouveau_ttm.c | 373 +- drivers/gpu/drm/nouveau/nouveau_ttm.h | 25 + drivers/gpu/drm/nouveau/nouveau_vga.c | 98 + drivers/gpu/drm/nouveau/nouveau_vga.h | 8 + drivers/gpu/drm/nouveau/nouveau_volt.c | 55 +- drivers/gpu/drm/nouveau/nv04_fb.c | 55 - drivers/gpu/drm/nouveau/nv04_fbcon.c | 100 +- drivers/gpu/drm/nouveau/nv04_fence.c | 111 + drivers/gpu/drm/nouveau/nv04_fifo.c | 543 - drivers/gpu/drm/nouveau/nv04_graph.c | 1353 --- drivers/gpu/drm/nouveau/nv04_instmem.c | 192 - drivers/gpu/drm/nouveau/nv04_mc.c | 24 - drivers/gpu/drm/nouveau/nv04_pm.c | 41 +- drivers/gpu/drm/nouveau/nv04_timer.c | 84 - drivers/gpu/drm/nouveau/nv10_fb.c | 104 - drivers/gpu/drm/nouveau/nv10_fence.c | 110 + drivers/gpu/drm/nouveau/nv10_fence.h | 19 + drivers/gpu/drm/nouveau/nv10_fifo.c | 246 - drivers/gpu/drm/nouveau/nv10_gpio.c | 123 - drivers/gpu/drm/nouveau/nv10_graph.c | 1194 -- drivers/gpu/drm/nouveau/nv17_fence.c | 149 + drivers/gpu/drm/nouveau/nv20_fb.c | 148 - drivers/gpu/drm/nouveau/nv20_graph.c | 842 -- drivers/gpu/drm/nouveau/nv30_fb.c | 116 - drivers/gpu/drm/nouveau/nv31_mpeg.c | 344 - drivers/gpu/drm/nouveau/nv40_fb.c | 163 - drivers/gpu/drm/nouveau/nv40_fifo.c | 307 - drivers/gpu/drm/nouveau/nv40_graph.c | 490 - drivers/gpu/drm/nouveau/nv40_mc.c | 28 - drivers/gpu/drm/nouveau/nv40_pm.c | 185 +- drivers/gpu/drm/nouveau/nv50_crtc.c | 809 -- drivers/gpu/drm/nouveau/nv50_cursor.c | 139 - drivers/gpu/drm/nouveau/nv50_dac.c | 311 - drivers/gpu/drm/nouveau/nv50_display.c | 2904 +++-- drivers/gpu/drm/nouveau/nv50_display.h | 66 +- drivers/gpu/drm/nouveau/nv50_evo.c | 417 - drivers/gpu/drm/nouveau/nv50_evo.h | 120 - drivers/gpu/drm/nouveau/nv50_fb.c | 294 - drivers/gpu/drm/nouveau/nv50_fbcon.c | 95 +- drivers/gpu/drm/nouveau/nv50_fence.c | 119 + drivers/gpu/drm/nouveau/nv50_fifo.c | 506 - drivers/gpu/drm/nouveau/nv50_gpio.c | 139 - drivers/gpu/drm/nouveau/nv50_graph.c | 1079 -- drivers/gpu/drm/nouveau/nv50_instmem.c | 428 - drivers/gpu/drm/nouveau/nv50_mpeg.c | 256 - drivers/gpu/drm/nouveau/nv50_pm.c | 253 +- drivers/gpu/drm/nouveau/nv50_sor.c | 514 - drivers/gpu/drm/nouveau/nv50_vram.c | 237 - drivers/gpu/drm/nouveau/nv84_bsp.c | 83 - drivers/gpu/drm/nouveau/nv84_crypt.c | 193 - drivers/gpu/drm/nouveau/nv84_fence.c | 276 + drivers/gpu/drm/nouveau/nv84_vp.c | 83 - drivers/gpu/drm/nouveau/nva3_copy.c | 226 - drivers/gpu/drm/nouveau/nva3_pm.c | 404 +- drivers/gpu/drm/nouveau/nvc0_copy.c | 243 - drivers/gpu/drm/nouveau/nvc0_fb.c | 134 - drivers/gpu/drm/nouveau/nvc0_fbcon.c | 83 +- drivers/gpu/drm/nouveau/nvc0_fence.c | 90 + drivers/gpu/drm/nouveau/nvc0_fifo.c | 536 - drivers/gpu/drm/nouveau/nvc0_graph.c | 895 -- drivers/gpu/drm/nouveau/nvc0_graph.h | 97 - drivers/gpu/drm/nouveau/nvc0_grctx.c | 2878 ----- drivers/gpu/drm/nouveau/nvc0_instmem.c | 223 - drivers/gpu/drm/nouveau/nvc0_pm.c | 263 +- drivers/gpu/drm/nouveau/nvc0_vm.c | 136 - drivers/gpu/drm/nouveau/nvc0_vram.c | 160 - drivers/gpu/drm/nouveau/nvd0_display.c | 2113 ---- drivers/gpu/drm/omapdrm/Kconfig | 25 + drivers/gpu/drm/omapdrm/Makefile | 24 + drivers/gpu/drm/omapdrm/TODO | 23 + drivers/gpu/drm/omapdrm/omap_connector.c | 319 + drivers/gpu/drm/omapdrm/omap_crtc.c | 661 ++ drivers/gpu/drm/omapdrm/omap_debugfs.c | 125 + drivers/gpu/drm/omapdrm/omap_dmm_priv.h | 188 + drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 986 ++ drivers/gpu/drm/omapdrm/omap_dmm_tiler.h | 141 + drivers/gpu/drm/omapdrm/omap_drv.c | 712 ++ drivers/gpu/drm/omapdrm/omap_drv.h | 303 + drivers/gpu/drm/omapdrm/omap_encoder.c | 188 + drivers/gpu/drm/omapdrm/omap_fb.c | 471 + drivers/gpu/drm/omapdrm/omap_fbdev.c | 397 + drivers/gpu/drm/omapdrm/omap_gem.c | 1507 +++ drivers/gpu/drm/omapdrm/omap_gem_dmabuf.c | 224 + drivers/gpu/drm/omapdrm/omap_gem_helpers.c | 169 + drivers/gpu/drm/omapdrm/omap_irq.c | 327 + drivers/gpu/drm/omapdrm/omap_plane.c | 454 + drivers/gpu/drm/omapdrm/tcm-sita.c | 703 ++ drivers/gpu/drm/omapdrm/tcm-sita.h | 95 + drivers/gpu/drm/omapdrm/tcm.h | 328 + drivers/gpu/drm/qxl/Kconfig | 11 + drivers/gpu/drm/qxl/Makefile | 9 + drivers/gpu/drm/qxl/qxl_cmd.c | 694 ++ drivers/gpu/drm/qxl/qxl_debugfs.c | 141 + drivers/gpu/drm/qxl/qxl_dev.h | 879 ++ drivers/gpu/drm/qxl/qxl_display.c | 973 ++ drivers/gpu/drm/qxl/qxl_draw.c | 390 + drivers/gpu/drm/qxl/qxl_drv.c | 145 + drivers/gpu/drm/qxl/qxl_drv.h | 559 + drivers/gpu/drm/qxl/qxl_dumb.c | 93 + drivers/gpu/drm/qxl/qxl_fb.c | 567 + drivers/gpu/drm/qxl/qxl_fence.c | 97 + drivers/gpu/drm/qxl/qxl_gem.c | 149 + drivers/gpu/drm/qxl/qxl_image.c | 176 + drivers/gpu/drm/qxl/qxl_ioctl.c | 412 + drivers/gpu/drm/qxl/qxl_irq.c | 97 + drivers/gpu/drm/qxl/qxl_kms.c | 303 + drivers/gpu/drm/qxl/qxl_object.c | 365 + drivers/gpu/drm/qxl/qxl_object.h | 112 + drivers/gpu/drm/qxl/qxl_release.c | 304 + drivers/gpu/drm/qxl/qxl_ttm.c | 581 + drivers/gpu/drm/r128/r128_cce.c | 5 +- drivers/gpu/drm/r128/r128_drv.c | 8 +- drivers/gpu/drm/r128/r128_ioc32.c | 5 +- drivers/gpu/drm/r128/r128_irq.c | 5 +- drivers/gpu/drm/r128/r128_state.c | 5 +- drivers/gpu/drm/radeon/Kconfig | 33 +- drivers/gpu/drm/radeon/Makefile | 15 +- drivers/gpu/drm/radeon/atom.c | 15 +- drivers/gpu/drm/radeon/atom.h | 2 +- drivers/gpu/drm/radeon/atombios.h | 2 + drivers/gpu/drm/radeon/atombios_crtc.c | 746 +- drivers/gpu/drm/radeon/atombios_dp.c | 227 +- drivers/gpu/drm/radeon/atombios_encoders.c | 552 +- drivers/gpu/drm/radeon/atombios_i2c.c | 4 +- drivers/gpu/drm/radeon/evergreen.c | 2923 +++-- drivers/gpu/drm/radeon/evergreen_blit_kms.c | 49 +- drivers/gpu/drm/radeon/evergreen_cs.c | 1175 +- drivers/gpu/drm/radeon/evergreen_hdmi.c | 300 + drivers/gpu/drm/radeon/evergreen_reg.h | 7 +- drivers/gpu/drm/radeon/evergreend.h | 470 +- drivers/gpu/drm/radeon/ni.c | 1747 ++- drivers/gpu/drm/radeon/nid.h | 152 +- drivers/gpu/drm/radeon/r100.c | 2035 ++-- drivers/gpu/drm/radeon/r100_track.h | 4 - drivers/gpu/drm/radeon/r100d.h | 11 - drivers/gpu/drm/radeon/r200.c | 37 +- drivers/gpu/drm/radeon/r300.c | 104 +- drivers/gpu/drm/radeon/r300_cmdbuf.c | 11 +- drivers/gpu/drm/radeon/r300d.h | 11 - drivers/gpu/drm/radeon/r420.c | 32 +- drivers/gpu/drm/radeon/r500_reg.h | 3 + drivers/gpu/drm/radeon/r520.c | 33 +- drivers/gpu/drm/radeon/r600.c | 1978 +++- drivers/gpu/drm/radeon/r600_audio.c | 276 +- drivers/gpu/drm/radeon/r600_blit.c | 97 +- drivers/gpu/drm/radeon/r600_blit_kms.c | 235 +- drivers/gpu/drm/radeon/r600_blit_shaders.h | 1 + drivers/gpu/drm/radeon/r600_cp.c | 14 +- drivers/gpu/drm/radeon/r600_cs.c | 992 +- drivers/gpu/drm/radeon/r600_hdmi.c | 666 +- drivers/gpu/drm/radeon/r600_reg.h | 54 +- drivers/gpu/drm/radeon/r600d.h | 449 +- drivers/gpu/drm/radeon/radeon.h | 756 +- drivers/gpu/drm/radeon/radeon_acpi.c | 615 +- drivers/gpu/drm/radeon/radeon_acpi.h | 445 + drivers/gpu/drm/radeon/radeon_agp.c | 10 +- drivers/gpu/drm/radeon/radeon_asic.c | 523 +- drivers/gpu/drm/radeon/radeon_asic.h | 157 +- drivers/gpu/drm/radeon/radeon_atombios.c | 206 +- drivers/gpu/drm/radeon/radeon_atpx_handler.c | 526 +- drivers/gpu/drm/radeon/radeon_benchmark.c | 35 +- drivers/gpu/drm/radeon/radeon_bios.c | 194 +- drivers/gpu/drm/radeon/radeon_clocks.c | 4 +- drivers/gpu/drm/radeon/radeon_combios.c | 210 +- drivers/gpu/drm/radeon/radeon_connectors.c | 244 +- drivers/gpu/drm/radeon/radeon_cp.c | 34 +- drivers/gpu/drm/radeon/radeon_cs.c | 507 +- drivers/gpu/drm/radeon/radeon_cursor.c | 42 +- drivers/gpu/drm/radeon/radeon_device.c | 695 +- drivers/gpu/drm/radeon/radeon_display.c | 163 +- drivers/gpu/drm/radeon/radeon_drv.c | 143 +- drivers/gpu/drm/radeon/radeon_drv.h | 17 +- drivers/gpu/drm/radeon/radeon_encoders.c | 25 +- drivers/gpu/drm/radeon/radeon_family.h | 2 + drivers/gpu/drm/radeon/radeon_fb.c | 54 +- drivers/gpu/drm/radeon/radeon_fence.c | 991 +- drivers/gpu/drm/radeon/radeon_gart.c | 1072 +- drivers/gpu/drm/radeon/radeon_gem.c | 166 +- drivers/gpu/drm/radeon/radeon_i2c.c | 16 +- drivers/gpu/drm/radeon/radeon_ioc32.c | 7 +- drivers/gpu/drm/radeon/radeon_irq.c | 7 +- drivers/gpu/drm/radeon/radeon_irq_kms.c | 287 +- drivers/gpu/drm/radeon/radeon_kms.c | 365 +- drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 24 +- .../gpu/drm/radeon/radeon_legacy_encoders.c | 282 +- drivers/gpu/drm/radeon/radeon_legacy_tv.c | 4 +- drivers/gpu/drm/radeon/radeon_mem.c | 7 +- drivers/gpu/drm/radeon/radeon_mode.h | 111 +- drivers/gpu/drm/radeon/radeon_object.c | 115 +- drivers/gpu/drm/radeon/radeon_object.h | 38 +- drivers/gpu/drm/radeon/radeon_pm.c | 159 +- drivers/gpu/drm/radeon/radeon_prime.c | 98 + drivers/gpu/drm/radeon/radeon_reg.h | 15 + drivers/gpu/drm/radeon/radeon_ring.c | 874 +- drivers/gpu/drm/radeon/radeon_sa.c | 356 +- drivers/gpu/drm/radeon/radeon_semaphore.c | 173 +- drivers/gpu/drm/radeon/radeon_state.c | 10 +- drivers/gpu/drm/radeon/radeon_test.c | 162 +- drivers/gpu/drm/radeon/radeon_trace_points.c | 2 +- drivers/gpu/drm/radeon/radeon_ttm.c | 110 +- drivers/gpu/drm/radeon/radeon_uvd.c | 845 ++ drivers/gpu/drm/radeon/reg_srcs/cayman | 1 + drivers/gpu/drm/radeon/reg_srcs/r600 | 9 - drivers/gpu/drm/radeon/reg_srcs/rv515 | 2 + drivers/gpu/drm/radeon/rs400.c | 35 +- drivers/gpu/drm/radeon/rs600.c | 194 +- drivers/gpu/drm/radeon/rs600d.h | 14 + drivers/gpu/drm/radeon/rs690.c | 64 +- drivers/gpu/drm/radeon/rs690d.h | 3 + drivers/gpu/drm/radeon/rv515.c | 240 +- drivers/gpu/drm/radeon/rv515d.h | 11 - drivers/gpu/drm/radeon/rv770.c | 1389 ++- drivers/gpu/drm/radeon/rv770d.h | 316 + drivers/gpu/drm/radeon/si.c | 2878 +++-- drivers/gpu/drm/radeon/si_reg.h | 72 + drivers/gpu/drm/radeon/sid.h | 247 +- drivers/gpu/drm/savage/savage_bci.c | 17 +- drivers/gpu/drm/savage/savage_drv.c | 11 +- drivers/gpu/drm/savage/savage_state.c | 4 +- drivers/gpu/drm/shmobile/Kconfig | 10 + drivers/gpu/drm/shmobile/Makefile | 7 + .../gpu/drm/shmobile/shmob_drm_backlight.c | 90 + .../gpu/drm/shmobile/shmob_drm_backlight.h | 23 + drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 752 ++ drivers/gpu/drm/shmobile/shmob_drm_crtc.h | 60 + drivers/gpu/drm/shmobile/shmob_drm_drv.c | 359 + drivers/gpu/drm/shmobile/shmob_drm_drv.h | 47 + drivers/gpu/drm/shmobile/shmob_drm_kms.c | 160 + drivers/gpu/drm/shmobile/shmob_drm_kms.h | 34 + drivers/gpu/drm/shmobile/shmob_drm_plane.c | 268 + drivers/gpu/drm/shmobile/shmob_drm_plane.h | 22 + drivers/gpu/drm/shmobile/shmob_drm_regs.h | 311 + drivers/gpu/drm/sis/sis_drv.c | 15 +- drivers/gpu/drm/sis/sis_drv.h | 2 +- drivers/gpu/drm/sis/sis_mm.c | 36 +- drivers/gpu/drm/tdfx/tdfx_drv.c | 8 +- drivers/gpu/drm/tilcdc/Kconfig | 13 + drivers/gpu/drm/tilcdc/Makefile | 13 + drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 602 ++ drivers/gpu/drm/tilcdc/tilcdc_drv.c | 610 ++ drivers/gpu/drm/tilcdc/tilcdc_drv.h | 150 + drivers/gpu/drm/tilcdc/tilcdc_panel.c | 435 + drivers/gpu/drm/tilcdc/tilcdc_panel.h | 26 + drivers/gpu/drm/tilcdc/tilcdc_regs.h | 154 + drivers/gpu/drm/tilcdc/tilcdc_slave.c | 375 + drivers/gpu/drm/tilcdc/tilcdc_slave.h | 26 + drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 418 + drivers/gpu/drm/tilcdc/tilcdc_tfp410.h | 26 + drivers/gpu/drm/ttm/ttm_agp_backend.c | 8 +- drivers/gpu/drm/ttm/ttm_bo.c | 446 +- drivers/gpu/drm/ttm/ttm_bo_manager.c | 8 +- drivers/gpu/drm/ttm/ttm_bo_util.c | 47 +- drivers/gpu/drm/ttm/ttm_bo_vm.c | 12 +- drivers/gpu/drm/ttm/ttm_execbuf_util.c | 92 +- drivers/gpu/drm/ttm/ttm_lock.c | 4 +- drivers/gpu/drm/ttm/ttm_memory.c | 7 +- drivers/gpu/drm/ttm/ttm_module.c | 4 +- drivers/gpu/drm/ttm/ttm_object.c | 55 +- drivers/gpu/drm/ttm/ttm_page_alloc.c | 9 +- drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 9 +- drivers/gpu/drm/ttm/ttm_tt.c | 36 +- drivers/gpu/drm/udl/Kconfig | 3 +- drivers/gpu/drm/udl/udl_connector.c | 51 +- drivers/gpu/drm/udl/udl_drv.c | 30 +- drivers/gpu/drm/udl/udl_drv.h | 7 +- drivers/gpu/drm/udl/udl_encoder.c | 10 +- drivers/gpu/drm/udl/udl_fb.c | 149 +- drivers/gpu/drm/udl/udl_gem.c | 95 +- drivers/gpu/drm/udl/udl_main.c | 11 +- drivers/gpu/drm/udl/udl_modeset.c | 59 +- drivers/gpu/drm/udl/udl_transfer.c | 61 +- drivers/gpu/drm/via/via_dma.c | 5 +- drivers/gpu/drm/via/via_dmablit.c | 4 +- drivers/gpu/drm/via/via_drv.c | 13 +- drivers/gpu/drm/via/via_drv.h | 2 +- drivers/gpu/drm/via/via_irq.c | 5 +- drivers/gpu/drm/via/via_map.c | 8 +- drivers/gpu/drm/via/via_mm.c | 17 +- drivers/gpu/drm/via/via_verifier.c | 5 +- drivers/gpu/drm/via/via_video.c | 4 +- drivers/gpu/drm/vmwgfx/Kconfig | 8 + drivers/gpu/drm/vmwgfx/Makefile | 3 +- drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h | 909 ++ drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c | 29 +- drivers/gpu/drm/vmwgfx/vmwgfx_context.c | 274 + drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c | 28 +- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 124 +- drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 181 +- drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 921 +- drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 6 +- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 6 +- drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c | 4 +- drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c | 6 +- drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c | 6 +- drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | 49 +- drivers/gpu/drm/vmwgfx/vmwgfx_irq.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 96 +- drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 4 +- drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c | 25 +- drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 2281 ++-- drivers/gpu/drm/vmwgfx/vmwgfx_resource_priv.h | 84 + drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 4 +- drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 893 ++ drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c | 2 +- drivers/gpu/msm/kgsl_drm.c | 2 +- drivers/video/Kconfig | 3 + drivers/video/Makefile | 1 + drivers/video/hdmi.c | 323 + include/Kbuild | 2 +- include/drm/drmP.h | 106 +- include/drm/drm_buffer.h | 2 +- include/drm/drm_crtc.h | 185 +- include/drm/drm_crtc_helper.h | 30 +- include/drm/drm_dp_helper.h | 140 +- include/drm/drm_edid.h | 41 +- include/drm/drm_encoder_slave.h | 26 +- include/drm/drm_fb_cma_helper.h | 32 + include/drm/drm_fb_helper.h | 29 +- include/drm/drm_fixed.h | 1 + include/drm/drm_gem_cma_helper.h | 48 + include/drm/drm_hashtab.h | 14 + include/drm/drm_mem_util.h | 8 +- include/drm/drm_memory.h | 2 +- include/drm/drm_mm.h | 160 +- include/drm/drm_os_linux.h | 9 - include/drm/drm_pciids.h | 107 +- include/drm/exynos_drm.h | 157 +- include/drm/i915_drm.h | 853 +- include/drm/intel-gtt.h | 39 +- include/drm/kgsl_drm.h | 2 +- include/drm/ttm/ttm_bo_api.h | 44 +- include/drm/ttm/ttm_bo_driver.h | 131 +- include/drm/ttm/ttm_execbuf_util.h | 5 +- include/drm/ttm/ttm_lock.h | 2 +- include/drm/ttm/ttm_memory.h | 2 - include/drm/ttm/ttm_object.h | 6 +- include/drm/ttm/ttm_page_alloc.h | 4 +- include/linux/dma-buf.h | 120 +- include/linux/fs.h | 5 + include/linux/hdmi.h | 231 + include/{ => uapi}/drm/Kbuild | 4 +- include/{ => uapi}/drm/drm.h | 15 +- include/{ => uapi}/drm/drm_fourcc.h | 8 +- include/{ => uapi}/drm/drm_mode.h | 27 +- include/{ => uapi}/drm/drm_sarea.h | 4 +- include/uapi/drm/exynos_drm.h | 390 + include/{ => uapi}/drm/i810_drm.h | 0 include/uapi/drm/i915_drm.h | 983 ++ include/{ => uapi}/drm/mga_drm.h | 2 +- include/{ => uapi}/drm/nouveau_drm.h | 94 +- include/uapi/drm/omap_drm.h | 123 + include/uapi/drm/qxl_drm.h | 152 + include/{ => uapi}/drm/r128_drm.h | 0 include/{ => uapi}/drm/radeon_drm.h | 37 +- include/{ => uapi}/drm/savage_drm.h | 0 include/{ => uapi}/drm/sis_drm.h | 8 +- include/uapi/drm/tegra_drm.h | 136 + include/{ => uapi}/drm/via_drm.h | 2 +- include/{ => uapi}/drm/vmwgfx_drm.h | 0 976 files changed, 189090 insertions(+), 74874 deletions(-) create mode 100644 drivers/gpu/drm/ast/Kconfig create mode 100644 drivers/gpu/drm/ast/Makefile create mode 100644 drivers/gpu/drm/ast/ast_dram_tables.h create mode 100644 drivers/gpu/drm/ast/ast_drv.c create mode 100644 drivers/gpu/drm/ast/ast_drv.h create mode 100644 drivers/gpu/drm/ast/ast_fb.c create mode 100644 drivers/gpu/drm/ast/ast_main.c create mode 100644 drivers/gpu/drm/ast/ast_mode.c create mode 100644 drivers/gpu/drm/ast/ast_post.c create mode 100644 drivers/gpu/drm/ast/ast_tables.h create mode 100644 drivers/gpu/drm/ast/ast_ttm.c create mode 100644 drivers/gpu/drm/cirrus/Kconfig create mode 100644 drivers/gpu/drm/cirrus/Makefile create mode 100644 drivers/gpu/drm/cirrus/cirrus_drv.c create mode 100644 drivers/gpu/drm/cirrus/cirrus_drv.h create mode 100644 drivers/gpu/drm/cirrus/cirrus_fbdev.c create mode 100644 drivers/gpu/drm/cirrus/cirrus_main.c create mode 100644 drivers/gpu/drm/cirrus/cirrus_mode.c create mode 100644 drivers/gpu/drm/cirrus/cirrus_ttm.c rename drivers/gpu/drm/{drm_dp_i2c_helper.c => drm_dp_helper.c} (58%) delete mode 100644 drivers/gpu/drm/drm_edid_modes.h create mode 100644 drivers/gpu/drm/drm_fb_cma_helper.c create mode 100644 drivers/gpu/drm/drm_gem_cma_helper.c create mode 100644 drivers/gpu/drm/exynos/exynos_drm_dmabuf.c create mode 100644 drivers/gpu/drm/exynos/exynos_drm_dmabuf.h create mode 100644 drivers/gpu/drm/exynos/exynos_drm_fimc.c create mode 100644 drivers/gpu/drm/exynos/exynos_drm_fimc.h create mode 100644 drivers/gpu/drm/exynos/exynos_drm_g2d.c create mode 100644 drivers/gpu/drm/exynos/exynos_drm_g2d.h create mode 100644 drivers/gpu/drm/exynos/exynos_drm_gsc.c create mode 100644 drivers/gpu/drm/exynos/exynos_drm_gsc.h create mode 100644 drivers/gpu/drm/exynos/exynos_drm_iommu.c create mode 100644 drivers/gpu/drm/exynos/exynos_drm_iommu.h create mode 100644 drivers/gpu/drm/exynos/exynos_drm_ipp.c create mode 100644 drivers/gpu/drm/exynos/exynos_drm_ipp.h create mode 100644 drivers/gpu/drm/exynos/exynos_drm_rotator.c create mode 100644 drivers/gpu/drm/exynos/exynos_drm_rotator.h create mode 100644 drivers/gpu/drm/exynos/regs-fimc.h create mode 100644 drivers/gpu/drm/exynos/regs-gsc.h create mode 100644 drivers/gpu/drm/exynos/regs-rotator.h create mode 100644 drivers/gpu/drm/gma500/cdv_intel_dp.c delete mode 100644 drivers/gpu/drm/gma500/gem_glue.c delete mode 100644 drivers/gpu/drm/gma500/gem_glue.h create mode 100644 drivers/gpu/drm/gma500/opregion.c rename drivers/gpu/drm/gma500/{intel_opregion.c => opregion.h} (51%) create mode 100644 drivers/gpu/drm/i2c/Kconfig create mode 100644 drivers/gpu/drm/i2c/tda998x_drv.c create mode 100644 drivers/gpu/drm/i915/dvo_ns2501.c create mode 100644 drivers/gpu/drm/i915/i915_gem_context.c create mode 100644 drivers/gpu/drm/i915/i915_gem_dmabuf.c create mode 100644 drivers/gpu/drm/i915/i915_gem_stolen.c create mode 100644 drivers/gpu/drm/i915/i915_sysfs.c create mode 100644 drivers/gpu/drm/i915/i915_ums.c create mode 100644 drivers/gpu/drm/i915/intel_ddi.c create mode 100644 drivers/gpu/drm/i915/intel_pm.c create mode 100644 drivers/gpu/drm/mgag200/Kconfig create mode 100644 drivers/gpu/drm/mgag200/Makefile create mode 100644 drivers/gpu/drm/mgag200/mgag200_drv.c create mode 100644 drivers/gpu/drm/mgag200/mgag200_drv.h create mode 100644 drivers/gpu/drm/mgag200/mgag200_fb.c create mode 100644 drivers/gpu/drm/mgag200/mgag200_i2c.c create mode 100644 drivers/gpu/drm/mgag200/mgag200_main.c create mode 100644 drivers/gpu/drm/mgag200/mgag200_mode.c create mode 100644 drivers/gpu/drm/mgag200/mgag200_reg.h create mode 100644 drivers/gpu/drm/mgag200/mgag200_ttm.c create mode 100644 drivers/gpu/drm/nouveau/core/core/client.c create mode 100644 drivers/gpu/drm/nouveau/core/core/engctx.c create mode 100644 drivers/gpu/drm/nouveau/core/core/engine.c rename drivers/gpu/drm/nouveau/{nouveau_util.c => core/core/enum.c} (81%) create mode 100644 drivers/gpu/drm/nouveau/core/core/event.c create mode 100644 drivers/gpu/drm/nouveau/core/core/falcon.c create mode 100644 drivers/gpu/drm/nouveau/core/core/gpuobj.c create mode 100644 drivers/gpu/drm/nouveau/core/core/handle.c create mode 100644 drivers/gpu/drm/nouveau/core/core/mm.c create mode 100644 drivers/gpu/drm/nouveau/core/core/namedb.c create mode 100644 drivers/gpu/drm/nouveau/core/core/object.c create mode 100644 drivers/gpu/drm/nouveau/core/core/option.c create mode 100644 drivers/gpu/drm/nouveau/core/core/parent.c create mode 100644 drivers/gpu/drm/nouveau/core/core/printk.c create mode 100644 drivers/gpu/drm/nouveau/core/core/ramht.c create mode 100644 drivers/gpu/drm/nouveau/core/core/subdev.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/bsp/nv84.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/bsp/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/bsp/nve0.c rename drivers/gpu/drm/nouveau/{nva3_copy.fuc => core/engine/copy/fuc/nva3.fuc} (99%) rename drivers/gpu/drm/nouveau/{nva3_copy.fuc.h => core/engine/copy/fuc/nva3.fuc.h} (73%) rename drivers/gpu/drm/nouveau/{nvc0_copy.fuc.h => core/engine/copy/fuc/nvc0.fuc.h} (74%) create mode 100644 drivers/gpu/drm/nouveau/core/engine/copy/nva3.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/copy/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/copy/nve0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/crypt/fuc/nv98.fuc create mode 100644 drivers/gpu/drm/nouveau/core/engine/crypt/fuc/nv98.fuc.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/device/base.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/device/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/device/nv10.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/device/nv20.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/device/nv30.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/device/nv40.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/device/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/device/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/device/nve0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/base.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/dport.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/dport.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/hdanvd0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/hdminvd0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nv50.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nv84.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nv94.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nva0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nva3.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nve0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/nvf0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/piornv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/sornv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/sornv94.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/sornvd0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/disp/vga.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/dmaobj/nvd0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/base.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nv04.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nv50.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c rename drivers/gpu/drm/nouveau/{nouveau_grctx.h => core/engine/graph/ctx.h} (83%) rename drivers/gpu/drm/nouveau/{nv40_grctx.c => core/engine/graph/ctxnv40.c} (84%) rename drivers/gpu/drm/nouveau/{nv50_grctx.c => core/engine/graph/ctxnv50.c} (91%) create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c rename drivers/gpu/drm/nouveau/{nvc0_grgpc.fuc => core/engine/graph/fuc/gpcnvc0.fuc} (97%) rename drivers/gpu/drm/nouveau/{nvc0_grgpc.fuc.h => core/engine/graph/fuc/gpcnvc0.fuc.h} (78%) create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc.h rename drivers/gpu/drm/nouveau/{nvc0_grhub.fuc => core/engine/graph/fuc/hubnvc0.fuc} (97%) rename drivers/gpu/drm/nouveau/{nvc0_grhub.fuc.h => core/engine/graph/fuc/hubnvc0.fuc.h} (74%) create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc.h rename drivers/gpu/drm/nouveau/{nvc0_graph.fuc => core/engine/graph/fuc/nvc0.fuc} (100%) create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/fuc/nve0.fuc create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv10.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv20.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv20.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv25.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv2a.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv30.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv34.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv35.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv40.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv40.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nv50.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/nve0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/graph/regs.h create mode 100644 drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/mpeg/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/mpeg/nv84.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/ppp/nv98.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/ppp/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/software/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/software/nv10.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/software/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/software/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/vp/nv84.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/vp/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/engine/vp/nve0.c create mode 100644 drivers/gpu/drm/nouveau/core/include/core/class.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/client.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/debug.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/device.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/engctx.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/engine.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/enum.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/event.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/falcon.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/gpuobj.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/handle.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/math.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/mm.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/namedb.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/object.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/option.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/parent.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/printk.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/ramht.h create mode 100644 drivers/gpu/drm/nouveau/core/include/core/subdev.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/bsp.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/copy.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/crypt.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/device.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/disp.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/dmaobj.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/fifo.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/graph.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/mpeg.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/ppp.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/software.h create mode 100644 drivers/gpu/drm/nouveau/core/include/engine/vp.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bar.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/bit.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/bmp.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/conn.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/dcb.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/disp.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/dp.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/extdev.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/gpio.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/i2c.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/init.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/mxm.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/perf.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/pll.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/therm.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bios/xpio.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/bus.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/clock.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/devinit.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/fb.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/gpio.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/i2c.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/ibus.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/instmem.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/ltcg.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/mc.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/mxm.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/therm.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/timer.h create mode 100644 drivers/gpu/drm/nouveau/core/include/subdev/vga.h rename drivers/gpu/drm/nouveau/{nouveau_vm.h => core/include/subdev/vm.h} (58%) create mode 100644 drivers/gpu/drm/nouveau/core/os.h create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bar/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bar/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/bit.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/conn.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/dcb.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/disp.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/dp.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/extdev.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/gpio.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/i2c.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/init.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/mxm.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/perf.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/pll.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/therm.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bios/xpio.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bus/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bus/nv31.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bus/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/bus/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c rename drivers/gpu/drm/nouveau/{nouveau_ramht.h => core/subdev/clock/nv40.c} (55%) create mode 100644 drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/clock/pll.h create mode 100644 drivers/gpu/drm/nouveau/core/subdev/clock/pllnv04.c rename drivers/gpu/drm/nouveau/{nv50_calc.c => core/subdev/clock/pllnva3.c} (52%) create mode 100644 drivers/gpu/drm/nouveau/core/subdev/devinit/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/devinit/fbmem.h create mode 100644 drivers/gpu/drm/nouveau/core/subdev/devinit/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/devinit/nv05.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/devinit/nv10.c rename drivers/gpu/drm/nouveau/{nouveau_i2c.h => core/subdev/devinit/nv1a.c} (52%) create mode 100644 drivers/gpu/drm/nouveau/core/subdev/devinit/nv20.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/devinit/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv1a.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv35.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv36.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c rename drivers/gpu/drm/nouveau/{nouveau_util.h => core/subdev/fb/nv47.c} (53%) create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c rename drivers/gpu/drm/nouveau/{nv50_mc.c => core/subdev/fb/nv4e.c} (51%) create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/gpio/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/gpio/nv10.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/gpio/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/gpio/nvd0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/gpio/priv.h create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/anx9805.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/aux.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/bit.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/nv4e.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/nv50.h create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/nv94.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/i2c/nvd0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/ibus/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/ibus/nve0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/instmem/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.h create mode 100644 drivers/gpu/drm/nouveau/core/subdev/instmem/nv40.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/instmem/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/ltcg/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/mc/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/mc/nv04.c rename drivers/gpu/drm/nouveau/{nv98_crypt.c => core/subdev/mc/nv44.c} (52%) create mode 100644 drivers/gpu/drm/nouveau/core/subdev/mc/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/mxm/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/mxm/mxms.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/mxm/mxms.h create mode 100644 drivers/gpu/drm/nouveau/core/subdev/mxm/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/fan.c rename drivers/gpu/drm/nouveau/{nv98_ppp.c => core/subdev/therm/fannil.c} (54%) create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/fanpwm.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/fantog.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/ic.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/nv50.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/nv84.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/nva3.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/nvd0.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/priv.h create mode 100644 drivers/gpu/drm/nouveau/core/subdev/therm/temp.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/timer/base.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/timer/nv04.c rename drivers/gpu/drm/nouveau/{nouveau_vm.c => core/subdev/vm/base.c} (65%) create mode 100644 drivers/gpu/drm/nouveau/core/subdev/vm/nv04.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/vm/nv04.h create mode 100644 drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c create mode 100644 drivers/gpu/drm/nouveau/core/subdev/vm/nv44.c rename drivers/gpu/drm/nouveau/{nv50_vm.c => core/subdev/vm/nv50.c} (59%) create mode 100644 drivers/gpu/drm/nouveau/core/subdev/vm/nvc0.c create mode 100644 drivers/gpu/drm/nouveau/dispnv04/Makefile rename drivers/gpu/drm/nouveau/{nouveau_calc.c => dispnv04/arb.c} (54%) rename drivers/gpu/drm/nouveau/{nv04_crtc.c => dispnv04/crtc.c} (88%) rename drivers/gpu/drm/nouveau/{nv04_cursor.c => dispnv04/cursor.c} (87%) rename drivers/gpu/drm/nouveau/{nv04_dac.c => dispnv04/dac.c} (77%) rename drivers/gpu/drm/nouveau/{nv04_dfp.c => dispnv04/dfp.c} (82%) rename drivers/gpu/drm/nouveau/{nv04_display.c => dispnv04/disp.c} (58%) create mode 100644 drivers/gpu/drm/nouveau/dispnv04/disp.h rename drivers/gpu/drm/nouveau/{nouveau_hw.c => dispnv04/hw.c} (67%) rename drivers/gpu/drm/nouveau/{nouveau_hw.h => dispnv04/hw.h} (67%) rename drivers/gpu/drm/nouveau/{ => dispnv04}/nvreg.h (100%) rename drivers/gpu/drm/nouveau/{nv17_tv_modes.c => dispnv04/tvmodesnv17.c} (98%) rename drivers/gpu/drm/nouveau/{nv04_tv.c => dispnv04/tvnv04.c} (76%) rename drivers/gpu/drm/nouveau/{nv17_tv.c => dispnv04/tvnv17.c} (87%) rename drivers/gpu/drm/nouveau/{nv17_tv.h => dispnv04/tvnv17.h} (96%) create mode 100644 drivers/gpu/drm/nouveau/nouveau_abi16.c create mode 100644 drivers/gpu/drm/nouveau/nouveau_abi16.h create mode 100644 drivers/gpu/drm/nouveau/nouveau_acpi.h create mode 100644 drivers/gpu/drm/nouveau/nouveau_agp.c create mode 100644 drivers/gpu/drm/nouveau/nouveau_agp.h create mode 100644 drivers/gpu/drm/nouveau/nouveau_bo.h create mode 100644 drivers/gpu/drm/nouveau/nouveau_chan.c create mode 100644 drivers/gpu/drm/nouveau/nouveau_chan.h delete mode 100644 drivers/gpu/drm/nouveau/nouveau_channel.c create mode 100644 drivers/gpu/drm/nouveau/nouveau_debugfs.h create mode 100644 drivers/gpu/drm/nouveau/nouveau_display.h create mode 100644 drivers/gpu/drm/nouveau/nouveau_drm.c create mode 100644 drivers/gpu/drm/nouveau/nouveau_drm.h delete mode 100644 drivers/gpu/drm/nouveau/nouveau_drv.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_drv.h delete mode 100644 drivers/gpu/drm/nouveau/nouveau_fb.h create mode 100644 drivers/gpu/drm/nouveau/nouveau_fence.h create mode 100644 drivers/gpu/drm/nouveau/nouveau_gem.h delete mode 100644 drivers/gpu/drm/nouveau/nouveau_gpio.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_gpio.h delete mode 100644 drivers/gpu/drm/nouveau/nouveau_hdmi.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_i2c.c create mode 100644 drivers/gpu/drm/nouveau/nouveau_ioctl.h delete mode 100644 drivers/gpu/drm/nouveau/nouveau_irq.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_mm.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_mm.h delete mode 100644 drivers/gpu/drm/nouveau/nouveau_mxm.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_notifier.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_object.c create mode 100644 drivers/gpu/drm/nouveau/nouveau_prime.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_ramht.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_state.c delete mode 100644 drivers/gpu/drm/nouveau/nouveau_temp.c create mode 100644 drivers/gpu/drm/nouveau/nouveau_ttm.h create mode 100644 drivers/gpu/drm/nouveau/nouveau_vga.c create mode 100644 drivers/gpu/drm/nouveau/nouveau_vga.h delete mode 100644 drivers/gpu/drm/nouveau/nv04_fb.c create mode 100644 drivers/gpu/drm/nouveau/nv04_fence.c delete mode 100644 drivers/gpu/drm/nouveau/nv04_fifo.c delete mode 100644 drivers/gpu/drm/nouveau/nv04_graph.c delete mode 100644 drivers/gpu/drm/nouveau/nv04_instmem.c delete mode 100644 drivers/gpu/drm/nouveau/nv04_mc.c delete mode 100644 drivers/gpu/drm/nouveau/nv04_timer.c delete mode 100644 drivers/gpu/drm/nouveau/nv10_fb.c create mode 100644 drivers/gpu/drm/nouveau/nv10_fence.c create mode 100644 drivers/gpu/drm/nouveau/nv10_fence.h delete mode 100644 drivers/gpu/drm/nouveau/nv10_fifo.c delete mode 100644 drivers/gpu/drm/nouveau/nv10_gpio.c delete mode 100644 drivers/gpu/drm/nouveau/nv10_graph.c create mode 100644 drivers/gpu/drm/nouveau/nv17_fence.c delete mode 100644 drivers/gpu/drm/nouveau/nv20_fb.c delete mode 100644 drivers/gpu/drm/nouveau/nv20_graph.c delete mode 100644 drivers/gpu/drm/nouveau/nv30_fb.c delete mode 100644 drivers/gpu/drm/nouveau/nv31_mpeg.c delete mode 100644 drivers/gpu/drm/nouveau/nv40_fb.c delete mode 100644 drivers/gpu/drm/nouveau/nv40_fifo.c delete mode 100644 drivers/gpu/drm/nouveau/nv40_graph.c delete mode 100644 drivers/gpu/drm/nouveau/nv40_mc.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_crtc.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_cursor.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_dac.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_evo.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_evo.h delete mode 100644 drivers/gpu/drm/nouveau/nv50_fb.c create mode 100644 drivers/gpu/drm/nouveau/nv50_fence.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_fifo.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_gpio.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_graph.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_instmem.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_mpeg.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_sor.c delete mode 100644 drivers/gpu/drm/nouveau/nv50_vram.c delete mode 100644 drivers/gpu/drm/nouveau/nv84_bsp.c delete mode 100644 drivers/gpu/drm/nouveau/nv84_crypt.c create mode 100644 drivers/gpu/drm/nouveau/nv84_fence.c delete mode 100644 drivers/gpu/drm/nouveau/nv84_vp.c delete mode 100644 drivers/gpu/drm/nouveau/nva3_copy.c delete mode 100644 drivers/gpu/drm/nouveau/nvc0_copy.c delete mode 100644 drivers/gpu/drm/nouveau/nvc0_fb.c create mode 100644 drivers/gpu/drm/nouveau/nvc0_fence.c delete mode 100644 drivers/gpu/drm/nouveau/nvc0_fifo.c delete mode 100644 drivers/gpu/drm/nouveau/nvc0_graph.c delete mode 100644 drivers/gpu/drm/nouveau/nvc0_graph.h delete mode 100644 drivers/gpu/drm/nouveau/nvc0_grctx.c delete mode 100644 drivers/gpu/drm/nouveau/nvc0_instmem.c delete mode 100644 drivers/gpu/drm/nouveau/nvc0_vm.c delete mode 100644 drivers/gpu/drm/nouveau/nvc0_vram.c delete mode 100644 drivers/gpu/drm/nouveau/nvd0_display.c create mode 100644 drivers/gpu/drm/omapdrm/Kconfig create mode 100644 drivers/gpu/drm/omapdrm/Makefile create mode 100644 drivers/gpu/drm/omapdrm/TODO create mode 100644 drivers/gpu/drm/omapdrm/omap_connector.c create mode 100644 drivers/gpu/drm/omapdrm/omap_crtc.c create mode 100644 drivers/gpu/drm/omapdrm/omap_debugfs.c create mode 100644 drivers/gpu/drm/omapdrm/omap_dmm_priv.h create mode 100644 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c create mode 100644 drivers/gpu/drm/omapdrm/omap_dmm_tiler.h create mode 100644 drivers/gpu/drm/omapdrm/omap_drv.c create mode 100644 drivers/gpu/drm/omapdrm/omap_drv.h create mode 100644 drivers/gpu/drm/omapdrm/omap_encoder.c create mode 100644 drivers/gpu/drm/omapdrm/omap_fb.c create mode 100644 drivers/gpu/drm/omapdrm/omap_fbdev.c create mode 100644 drivers/gpu/drm/omapdrm/omap_gem.c create mode 100644 drivers/gpu/drm/omapdrm/omap_gem_dmabuf.c create mode 100644 drivers/gpu/drm/omapdrm/omap_gem_helpers.c create mode 100644 drivers/gpu/drm/omapdrm/omap_irq.c create mode 100644 drivers/gpu/drm/omapdrm/omap_plane.c create mode 100644 drivers/gpu/drm/omapdrm/tcm-sita.c create mode 100644 drivers/gpu/drm/omapdrm/tcm-sita.h create mode 100644 drivers/gpu/drm/omapdrm/tcm.h create mode 100644 drivers/gpu/drm/qxl/Kconfig create mode 100644 drivers/gpu/drm/qxl/Makefile create mode 100644 drivers/gpu/drm/qxl/qxl_cmd.c create mode 100644 drivers/gpu/drm/qxl/qxl_debugfs.c create mode 100644 drivers/gpu/drm/qxl/qxl_dev.h create mode 100644 drivers/gpu/drm/qxl/qxl_display.c create mode 100644 drivers/gpu/drm/qxl/qxl_draw.c create mode 100644 drivers/gpu/drm/qxl/qxl_drv.c create mode 100644 drivers/gpu/drm/qxl/qxl_drv.h create mode 100644 drivers/gpu/drm/qxl/qxl_dumb.c create mode 100644 drivers/gpu/drm/qxl/qxl_fb.c create mode 100644 drivers/gpu/drm/qxl/qxl_fence.c create mode 100644 drivers/gpu/drm/qxl/qxl_gem.c create mode 100644 drivers/gpu/drm/qxl/qxl_image.c create mode 100644 drivers/gpu/drm/qxl/qxl_ioctl.c create mode 100644 drivers/gpu/drm/qxl/qxl_irq.c create mode 100644 drivers/gpu/drm/qxl/qxl_kms.c create mode 100644 drivers/gpu/drm/qxl/qxl_object.c create mode 100644 drivers/gpu/drm/qxl/qxl_object.h create mode 100644 drivers/gpu/drm/qxl/qxl_release.c create mode 100644 drivers/gpu/drm/qxl/qxl_ttm.c create mode 100644 drivers/gpu/drm/radeon/evergreen_hdmi.c create mode 100644 drivers/gpu/drm/radeon/radeon_acpi.h create mode 100644 drivers/gpu/drm/radeon/radeon_prime.c create mode 100644 drivers/gpu/drm/radeon/radeon_uvd.c create mode 100644 drivers/gpu/drm/shmobile/Kconfig create mode 100644 drivers/gpu/drm/shmobile/Makefile create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_backlight.c create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_backlight.h create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_crtc.c create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_crtc.h create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_drv.c create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_drv.h create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_kms.c create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_kms.h create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_plane.c create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_plane.h create mode 100644 drivers/gpu/drm/shmobile/shmob_drm_regs.h create mode 100644 drivers/gpu/drm/tilcdc/Kconfig create mode 100644 drivers/gpu/drm/tilcdc/Makefile create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_crtc.c create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_drv.c create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_drv.h create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_panel.c create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_panel.h create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_regs.h create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave.c create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave.h create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_tfp410.c create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_tfp410.h create mode 100644 drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h create mode 100644 drivers/gpu/drm/vmwgfx/vmwgfx_context.c create mode 100644 drivers/gpu/drm/vmwgfx/vmwgfx_resource_priv.h create mode 100644 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c create mode 100644 drivers/video/hdmi.c create mode 100644 include/drm/drm_fb_cma_helper.h create mode 100644 include/drm/drm_gem_cma_helper.h create mode 100644 include/linux/hdmi.h rename include/{ => uapi}/drm/Kbuild (82%) rename include/{ => uapi}/drm/drm.h (98%) rename include/{ => uapi}/drm/drm_fourcc.h (97%) rename include/{ => uapi}/drm/drm_mode.h (96%) rename include/{ => uapi}/drm/drm_sarea.h (96%) create mode 100644 include/uapi/drm/exynos_drm.h rename include/{ => uapi}/drm/i810_drm.h (100%) create mode 100644 include/uapi/drm/i915_drm.h rename include/{ => uapi}/drm/mga_drm.h (99%) rename include/{ => uapi}/drm/nouveau_drm.h (61%) create mode 100644 include/uapi/drm/omap_drm.h create mode 100644 include/uapi/drm/qxl_drm.h rename include/{ => uapi}/drm/r128_drm.h (100%) rename include/{ => uapi}/drm/radeon_drm.h (96%) rename include/{ => uapi}/drm/savage_drm.h (100%) rename include/{ => uapi}/drm/sis_drm.h (96%) create mode 100644 include/uapi/drm/tegra_drm.h rename include/{ => uapi}/drm/via_drm.h (99%) rename include/{ => uapi}/drm/vmwgfx_drm.h (100%) diff --git a/Makefile b/Makefile index 46feb4f57e1c..df7599b77841 100644 --- a/Makefile +++ b/Makefile @@ -365,6 +365,7 @@ CFLAGS_GCOV = -fprofile-arcs -ftest-coverage LINUXINCLUDE := -I$(srctree)/arch/$(hdr-arch)/include \ -Iarch/$(hdr-arch)/include/generated -Iinclude \ $(if $(KBUILD_SRC), -I$(srctree)/include) \ + -I$(srctree)/include/uapi \ -include $(srctree)/include/linux/kconfig.h KBUILD_CPPFLAGS := -D__KERNEL__ diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c index 7cfb405b1ad5..08fe897c0b4c 100644 --- a/drivers/base/dma-buf.c +++ b/drivers/base/dma-buf.c @@ -27,9 +27,18 @@ #include #include #include +#include +#include static inline int is_dma_buf_file(struct file *); +struct dma_buf_list { + struct list_head head; + struct mutex lock; +}; + +static struct dma_buf_list db_list; + static int dma_buf_release(struct inode *inode, struct file *file) { struct dma_buf *dmabuf; @@ -39,7 +48,14 @@ static int dma_buf_release(struct inode *inode, struct file *file) dmabuf = file->private_data; + BUG_ON(dmabuf->vmapping_counter); + dmabuf->ops->release(dmabuf); + + mutex_lock(&db_list.lock); + list_del(&dmabuf->list_node); + mutex_unlock(&db_list.lock); + kfree(dmabuf); return 0; } @@ -75,22 +91,24 @@ static inline int is_dma_buf_file(struct file *file) } /** - * dma_buf_export - Creates a new dma_buf, and associates an anon file + * dma_buf_export_named - Creates a new dma_buf, and associates an anon file * with this buffer, so it can be exported. * Also connect the allocator specific data and ops to the buffer. + * Additionally, provide a name string for exporter; useful in debugging. * * @priv: [in] Attach private data of allocator to this buffer * @ops: [in] Attach allocator-defined dma buf ops to the new buffer. * @size: [in] Size of the buffer * @flags: [in] mode flags for the file. + * @exp_name: [in] name of the exporting module - useful for debugging. * * Returns, on success, a newly created dma_buf object, which wraps the * supplied private data and operations for dma_buf_ops. On either missing * ops, or error in allocating struct dma_buf, will return negative error. * */ -struct dma_buf *dma_buf_export(void *priv, const struct dma_buf_ops *ops, - size_t size, int flags) +struct dma_buf *dma_buf_export_named(void *priv, const struct dma_buf_ops *ops, + size_t size, int flags, const char *exp_name) { struct dma_buf *dmabuf; struct file *file; @@ -112,6 +130,7 @@ struct dma_buf *dma_buf_export(void *priv, const struct dma_buf_ops *ops, dmabuf->priv = priv; dmabuf->ops = ops; dmabuf->size = size; + dmabuf->exp_name = exp_name; file = anon_inode_getfile("dmabuf", &dma_buf_fops, dmabuf, flags); @@ -120,9 +139,13 @@ struct dma_buf *dma_buf_export(void *priv, const struct dma_buf_ops *ops, mutex_init(&dmabuf->lock); INIT_LIST_HEAD(&dmabuf->attachments); + mutex_lock(&db_list.lock); + list_add(&dmabuf->list_node, &db_list.head); + mutex_unlock(&db_list.lock); + return dmabuf; } -EXPORT_SYMBOL_GPL(dma_buf_export); +EXPORT_SYMBOL_GPL(dma_buf_export_named); /** @@ -134,15 +157,14 @@ EXPORT_SYMBOL_GPL(dma_buf_export); */ int dma_buf_fd(struct dma_buf *dmabuf, int flags) { - int error, fd; + int fd; if (!dmabuf || !dmabuf->file) return -EINVAL; - error = get_unused_fd_flags(flags); - if (error < 0) - return error; - fd = error; + fd = get_unused_fd_flags(flags); + if (fd < 0) + return fd; fd_install(fd, dmabuf->file); @@ -298,6 +320,8 @@ void dma_buf_unmap_attachment(struct dma_buf_attachment *attach, struct sg_table *sg_table, enum dma_data_direction direction) { + might_sleep(); + if (WARN_ON(!attach || !attach->dmabuf || !sg_table)) return; @@ -312,7 +336,7 @@ EXPORT_SYMBOL_GPL(dma_buf_unmap_attachment); * cpu in the kernel context. Calls begin_cpu_access to allow exporter-specific * preparations. Coherency is only guaranteed in the specified range for the * specified access direction. - * @dma_buf: [in] buffer to prepare cpu access for. + * @dmabuf: [in] buffer to prepare cpu access for. * @start: [in] start of range for cpu access. * @len: [in] length of range for cpu access. * @direction: [in] length of range for cpu access. @@ -339,7 +363,7 @@ EXPORT_SYMBOL_GPL(dma_buf_begin_cpu_access); * cpu in the kernel context. Calls end_cpu_access to allow exporter-specific * actions. Coherency is only guaranteed in the specified range for the * specified access direction. - * @dma_buf: [in] buffer to complete cpu access for. + * @dmabuf: [in] buffer to complete cpu access for. * @start: [in] start of range for cpu access. * @len: [in] length of range for cpu access. * @direction: [in] length of range for cpu access. @@ -359,7 +383,7 @@ EXPORT_SYMBOL_GPL(dma_buf_end_cpu_access); /** * dma_buf_kmap_atomic - Map a page of the buffer object into kernel address * space. The same restrictions as for kmap_atomic and friends apply. - * @dma_buf: [in] buffer to map page from. + * @dmabuf: [in] buffer to map page from. * @page_num: [in] page in PAGE_SIZE units to map. * * This call must always succeed, any necessary preparations that might fail @@ -375,7 +399,7 @@ EXPORT_SYMBOL_GPL(dma_buf_kmap_atomic); /** * dma_buf_kunmap_atomic - Unmap a page obtained by dma_buf_kmap_atomic. - * @dma_buf: [in] buffer to unmap page from. + * @dmabuf: [in] buffer to unmap page from. * @page_num: [in] page in PAGE_SIZE units to unmap. * @vaddr: [in] kernel space pointer obtained from dma_buf_kmap_atomic. * @@ -394,7 +418,7 @@ EXPORT_SYMBOL_GPL(dma_buf_kunmap_atomic); /** * dma_buf_kmap - Map a page of the buffer object into kernel address space. The * same restrictions as for kmap and friends apply. - * @dma_buf: [in] buffer to map page from. + * @dmabuf: [in] buffer to map page from. * @page_num: [in] page in PAGE_SIZE units to map. * * This call must always succeed, any necessary preparations that might fail @@ -410,7 +434,7 @@ EXPORT_SYMBOL_GPL(dma_buf_kmap); /** * dma_buf_kunmap - Unmap a page obtained by dma_buf_kmap. - * @dma_buf: [in] buffer to unmap page from. + * @dmabuf: [in] buffer to unmap page from. * @page_num: [in] page in PAGE_SIZE units to unmap. * @vaddr: [in] kernel space pointer obtained from dma_buf_kmap. * @@ -429,7 +453,7 @@ EXPORT_SYMBOL_GPL(dma_buf_kunmap); /** * dma_buf_mmap - Setup up a userspace mmap with the given vma - * @dma_buf: [in] buffer that should back the vma + * @dmabuf: [in] buffer that should back the vma * @vma: [in] vma for the mmap * @pgoff: [in] offset in pages where this mmap should start within the * dma-buf buffer. @@ -444,6 +468,9 @@ EXPORT_SYMBOL_GPL(dma_buf_kunmap); int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma, unsigned long pgoff) { + struct file *oldfile; + int ret; + if (WARN_ON(!dmabuf || !vma)) return -EINVAL; @@ -457,14 +484,228 @@ int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma, return -EINVAL; /* readjust the vma */ - if (vma->vm_file) - fput(vma->vm_file); - + get_file(dmabuf->file); + oldfile = vma->vm_file; vma->vm_file = dmabuf->file; - get_file(vma->vm_file); - vma->vm_pgoff = pgoff; - return dmabuf->ops->mmap(dmabuf, vma); + ret = dmabuf->ops->mmap(dmabuf, vma); + if (ret) { + /* restore old parameters on failure */ + vma->vm_file = oldfile; + fput(dmabuf->file); + } else { + if (oldfile) + fput(oldfile); + } + return ret; + } EXPORT_SYMBOL_GPL(dma_buf_mmap); + +/** + * dma_buf_vmap - Create virtual mapping for the buffer object into kernel + * address space. Same restrictions as for vmap and friends apply. + * @dmabuf: [in] buffer to vmap + * + * This call may fail due to lack of virtual mapping address space. + * These calls are optional in drivers. The intended use for them + * is for mapping objects linear in kernel space for high use objects. + * Please attempt to use kmap/kunmap before thinking about these interfaces. + */ +void *dma_buf_vmap(struct dma_buf *dmabuf) +{ + void *ptr; + + if (WARN_ON(!dmabuf)) + return NULL; + + if (!dmabuf->ops->vmap) + return NULL; + + mutex_lock(&dmabuf->lock); + if (dmabuf->vmapping_counter) { + dmabuf->vmapping_counter++; + BUG_ON(!dmabuf->vmap_ptr); + ptr = dmabuf->vmap_ptr; + goto out_unlock; + } + + BUG_ON(dmabuf->vmap_ptr); + + ptr = dmabuf->ops->vmap(dmabuf); + if (IS_ERR_OR_NULL(ptr)) + goto out_unlock; + + dmabuf->vmap_ptr = ptr; + dmabuf->vmapping_counter = 1; + +out_unlock: + mutex_unlock(&dmabuf->lock); + return ptr; +} +EXPORT_SYMBOL_GPL(dma_buf_vmap); + +/** + * dma_buf_vunmap - Unmap a vmap obtained by dma_buf_vmap. + * @dmabuf: [in] buffer to vunmap + * @vaddr: [in] vmap to vunmap + */ +void dma_buf_vunmap(struct dma_buf *dmabuf, void *vaddr) +{ + if (WARN_ON(!dmabuf)) + return; + + BUG_ON(!dmabuf->vmap_ptr); + BUG_ON(dmabuf->vmapping_counter == 0); + BUG_ON(dmabuf->vmap_ptr != vaddr); + + mutex_lock(&dmabuf->lock); + if (--dmabuf->vmapping_counter == 0) { + if (dmabuf->ops->vunmap) + dmabuf->ops->vunmap(dmabuf, vaddr); + dmabuf->vmap_ptr = NULL; + } + mutex_unlock(&dmabuf->lock); +} +EXPORT_SYMBOL_GPL(dma_buf_vunmap); + +#ifdef CONFIG_DEBUG_FS +static int dma_buf_describe(struct seq_file *s) +{ + int ret; + struct dma_buf *buf_obj; + struct dma_buf_attachment *attach_obj; + int count = 0, attach_count; + size_t size = 0; + + ret = mutex_lock_interruptible(&db_list.lock); + + if (ret) + return ret; + + seq_printf(s, "\nDma-buf Objects:\n"); + seq_printf(s, "\texp_name\tsize\tflags\tmode\tcount\n"); + + list_for_each_entry(buf_obj, &db_list.head, list_node) { + ret = mutex_lock_interruptible(&buf_obj->lock); + + if (ret) { + seq_printf(s, + "\tERROR locking buffer object: skipping\n"); + continue; + } + + seq_printf(s, "\t"); + + seq_printf(s, "\t%s\t%08zu\t%08x\t%08x\t%08ld\n", + buf_obj->exp_name, buf_obj->size, + buf_obj->file->f_flags, buf_obj->file->f_mode, + (long)(buf_obj->file->f_count.counter)); + + seq_printf(s, "\t\tAttached Devices:\n"); + attach_count = 0; + + list_for_each_entry(attach_obj, &buf_obj->attachments, node) { + seq_printf(s, "\t\t"); + + seq_printf(s, "%s\n", attach_obj->dev->init_name); + attach_count++; + } + + seq_printf(s, "\n\t\tTotal %d devices attached\n", + attach_count); + + count++; + size += buf_obj->size; + mutex_unlock(&buf_obj->lock); + } + + seq_printf(s, "\nTotal %d objects, %zu bytes\n", count, size); + + mutex_unlock(&db_list.lock); + return 0; +} + +static int dma_buf_show(struct seq_file *s, void *unused) +{ + void (*func)(struct seq_file *) = s->private; + func(s); + return 0; +} + +static int dma_buf_debug_open(struct inode *inode, struct file *file) +{ + return single_open(file, dma_buf_show, inode->i_private); +} + +static const struct file_operations dma_buf_debug_fops = { + .open = dma_buf_debug_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static struct dentry *dma_buf_debugfs_dir; + +static int dma_buf_init_debugfs(void) +{ + int err = 0; + dma_buf_debugfs_dir = debugfs_create_dir("dma_buf", NULL); + if (IS_ERR(dma_buf_debugfs_dir)) { + err = PTR_ERR(dma_buf_debugfs_dir); + dma_buf_debugfs_dir = NULL; + return err; + } + + err = dma_buf_debugfs_create_file("bufinfo", dma_buf_describe); + + if (err) + pr_debug("dma_buf: debugfs: failed to create node bufinfo\n"); + + return err; +} + +static void dma_buf_uninit_debugfs(void) +{ + if (dma_buf_debugfs_dir) + debugfs_remove_recursive(dma_buf_debugfs_dir); +} + +int dma_buf_debugfs_create_file(const char *name, + int (*write)(struct seq_file *)) +{ + struct dentry *d; + + d = debugfs_create_file(name, S_IRUGO, dma_buf_debugfs_dir, + write, &dma_buf_debug_fops); + + if (IS_ERR(d)) + return PTR_ERR(d); + + return 0; +} +#else +static inline int dma_buf_init_debugfs(void) +{ + return 0; +} +static inline void dma_buf_uninit_debugfs(void) +{ +} +#endif + +static int __init dma_buf_init(void) +{ + mutex_init(&db_list.lock); + INIT_LIST_HEAD(&db_list.head); + dma_buf_init_debugfs(); + return 0; +} +subsys_initcall(dma_buf_init); + +static void __exit dma_buf_deinit(void) +{ + dma_buf_uninit_debugfs(); +} +__exitcall(dma_buf_deinit); diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index e354bc0b052a..b16c50ee769c 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -7,6 +7,7 @@ menuconfig DRM tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)" depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && MMU + select HDMI select I2C select I2C_ALGOBIT select DMA_SHARED_BUFFER @@ -22,6 +23,7 @@ menuconfig DRM config DRM_USB tristate depends on DRM + depends on USB_SUPPORT && USB_ARCH_HAS_HCD select USB config DRM_KMS_HELPER @@ -53,6 +55,23 @@ config DRM_TTM GPU memory types. Will be enabled automatically if a device driver uses it. +config DRM_GEM_CMA_HELPER + bool + depends on DRM + help + Choose this if you need the GEM CMA helper functions + +config DRM_KMS_CMA_HELPER + bool + select DRM_GEM_CMA_HELPER + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + help + Choose this if you need the KMS CMA helper functions + +source "drivers/gpu/drm/i2c/Kconfig" + config DRM_TDFX tristate "3dfx Banshee/Voodoo3+" depends on DRM && PCI @@ -80,6 +99,7 @@ config DRM_RADEON select DRM_TTM select POWER_SUPPLY select HWMON + select BACKLIGHT_CLASS_DEVICE help Choose this option if you have an ATI Radeon graphics card. There are both PCI and AGP versions. You don't need to choose this to @@ -186,3 +206,17 @@ source "drivers/gpu/drm/vmwgfx/Kconfig" source "drivers/gpu/drm/gma500/Kconfig" source "drivers/gpu/drm/udl/Kconfig" + +source "drivers/gpu/drm/ast/Kconfig" + +source "drivers/gpu/drm/mgag200/Kconfig" + +source "drivers/gpu/drm/cirrus/Kconfig" + +source "drivers/gpu/drm/shmobile/Kconfig" + +source "drivers/gpu/drm/omapdrm/Kconfig" + +source "drivers/gpu/drm/tilcdc/Kconfig" + +source "drivers/gpu/drm/qxl/Kconfig" diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index c20da5bda355..1c9f24396002 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -8,18 +8,21 @@ drm-y := drm_auth.o drm_buffer.o drm_bufs.o drm_cache.o \ drm_context.o drm_dma.o \ drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \ drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \ - drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \ + drm_agpsupport.o drm_scatter.o drm_pci.o \ drm_platform.o drm_sysfs.o drm_hashtab.o drm_mm.o \ drm_crtc.o drm_modes.o drm_edid.o \ drm_info.o drm_debugfs.o drm_encoder_slave.o \ drm_trace_points.o drm_global.o drm_prime.o drm-$(CONFIG_COMPAT) += drm_ioc32.o +drm-$(CONFIG_DRM_GEM_CMA_HELPER) += drm_gem_cma_helper.o +drm-$(CONFIG_PCI) += ati_pcigart.o drm-usb-y := drm_usb.o -drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o drm_dp_i2c_helper.o +drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o drm_dp_helper.o drm_kms_helper-$(CONFIG_DRM_LOAD_EDID_FIRMWARE) += drm_edid_load.o +drm_kms_helper-$(CONFIG_DRM_KMS_CMA_HELPER) += drm_fb_cma_helper.o obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o @@ -34,6 +37,8 @@ obj-$(CONFIG_DRM_RADEON)+= radeon/ obj-$(CONFIG_DRM_MGA) += mga/ obj-$(CONFIG_DRM_I810) += i810/ obj-$(CONFIG_DRM_I915) += i915/ +obj-$(CONFIG_DRM_MGAG200) += mgag200/ +obj-$(CONFIG_DRM_CIRRUS_QEMU) += cirrus/ obj-$(CONFIG_DRM_SIS) += sis/ obj-$(CONFIG_DRM_SAVAGE)+= savage/ obj-$(CONFIG_DRM_VMWGFX)+= vmwgfx/ @@ -42,4 +47,9 @@ obj-$(CONFIG_DRM_NOUVEAU) +=nouveau/ obj-$(CONFIG_DRM_EXYNOS) +=exynos/ obj-$(CONFIG_DRM_GMA500) += gma500/ obj-$(CONFIG_DRM_UDL) += udl/ +obj-$(CONFIG_DRM_AST) += ast/ +obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/ +obj-$(CONFIG_DRM_OMAP) += omapdrm/ +obj-$(CONFIG_DRM_TILCDC) += tilcdc/ +obj-$(CONFIG_DRM_QXL) += qxl/ obj-y += i2c/ diff --git a/drivers/gpu/drm/ast/Kconfig b/drivers/gpu/drm/ast/Kconfig new file mode 100644 index 000000000000..da4a51eae824 --- /dev/null +++ b/drivers/gpu/drm/ast/Kconfig @@ -0,0 +1,16 @@ +config DRM_AST + tristate "AST server chips" + depends on DRM && PCI + select DRM_TTM + select FB_SYS_COPYAREA + select FB_SYS_FILLRECT + select FB_SYS_IMAGEBLIT + select DRM_KMS_HELPER + select DRM_TTM + help + Say yes for experimental AST GPU driver. Do not enable + this driver without having a working -modesetting, + and a version of AST that knows to fail if KMS + is bound to the driver. These GPUs are commonly found + in server chipsets. + diff --git a/drivers/gpu/drm/ast/Makefile b/drivers/gpu/drm/ast/Makefile new file mode 100644 index 000000000000..8df4f284ee24 --- /dev/null +++ b/drivers/gpu/drm/ast/Makefile @@ -0,0 +1,9 @@ +# +# Makefile for the drm device driver. This driver provides support for the +# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. + +ccflags-y := -Iinclude/drm + +ast-y := ast_drv.o ast_main.o ast_mode.o ast_fb.o ast_ttm.o ast_post.o + +obj-$(CONFIG_DRM_AST) := ast.o \ No newline at end of file diff --git a/drivers/gpu/drm/ast/ast_dram_tables.h b/drivers/gpu/drm/ast/ast_dram_tables.h new file mode 100644 index 000000000000..cc04539c0ff3 --- /dev/null +++ b/drivers/gpu/drm/ast/ast_dram_tables.h @@ -0,0 +1,144 @@ +#ifndef AST_DRAM_TABLES_H +#define AST_DRAM_TABLES_H + +/* DRAM timing tables */ +struct ast_dramstruct { + u16 index; + u32 data; +}; + +static const struct ast_dramstruct ast2000_dram_table_data[] = { + { 0x0108, 0x00000000 }, + { 0x0120, 0x00004a21 }, + { 0xFF00, 0x00000043 }, + { 0x0000, 0xFFFFFFFF }, + { 0x0004, 0x00000089 }, + { 0x0008, 0x22331353 }, + { 0x000C, 0x0d07000b }, + { 0x0010, 0x11113333 }, + { 0x0020, 0x00110350 }, + { 0x0028, 0x1e0828f0 }, + { 0x0024, 0x00000001 }, + { 0x001C, 0x00000000 }, + { 0x0014, 0x00000003 }, + { 0xFF00, 0x00000043 }, + { 0x0018, 0x00000131 }, + { 0x0014, 0x00000001 }, + { 0xFF00, 0x00000043 }, + { 0x0018, 0x00000031 }, + { 0x0014, 0x00000001 }, + { 0xFF00, 0x00000043 }, + { 0x0028, 0x1e0828f1 }, + { 0x0024, 0x00000003 }, + { 0x002C, 0x1f0f28fb }, + { 0x0030, 0xFFFFFE01 }, + { 0xFFFF, 0xFFFFFFFF } +}; + +static const struct ast_dramstruct ast1100_dram_table_data[] = { + { 0x2000, 0x1688a8a8 }, + { 0x2020, 0x000041f0 }, + { 0xFF00, 0x00000043 }, + { 0x0000, 0xfc600309 }, + { 0x006C, 0x00909090 }, + { 0x0064, 0x00050000 }, + { 0x0004, 0x00000585 }, + { 0x0008, 0x0011030f }, + { 0x0010, 0x22201724 }, + { 0x0018, 0x1e29011a }, + { 0x0020, 0x00c82222 }, + { 0x0014, 0x01001523 }, + { 0x001C, 0x1024010d }, + { 0x0024, 0x00cb2522 }, + { 0x0038, 0xffffff82 }, + { 0x003C, 0x00000000 }, + { 0x0040, 0x00000000 }, + { 0x0044, 0x00000000 }, + { 0x0048, 0x00000000 }, + { 0x004C, 0x00000000 }, + { 0x0050, 0x00000000 }, + { 0x0054, 0x00000000 }, + { 0x0058, 0x00000000 }, + { 0x005C, 0x00000000 }, + { 0x0060, 0x032aa02a }, + { 0x0064, 0x002d3000 }, + { 0x0068, 0x00000000 }, + { 0x0070, 0x00000000 }, + { 0x0074, 0x00000000 }, + { 0x0078, 0x00000000 }, + { 0x007C, 0x00000000 }, + { 0x0034, 0x00000001 }, + { 0xFF00, 0x00000043 }, + { 0x002C, 0x00000732 }, + { 0x0030, 0x00000040 }, + { 0x0028, 0x00000005 }, + { 0x0028, 0x00000007 }, + { 0x0028, 0x00000003 }, + { 0x0028, 0x00000001 }, + { 0x000C, 0x00005a08 }, + { 0x002C, 0x00000632 }, + { 0x0028, 0x00000001 }, + { 0x0030, 0x000003c0 }, + { 0x0028, 0x00000003 }, + { 0x0030, 0x00000040 }, + { 0x0028, 0x00000003 }, + { 0x000C, 0x00005a21 }, + { 0x0034, 0x00007c03 }, + { 0x0120, 0x00004c41 }, + { 0xffff, 0xffffffff }, +}; + +static const struct ast_dramstruct ast2100_dram_table_data[] = { + { 0x2000, 0x1688a8a8 }, + { 0x2020, 0x00004120 }, + { 0xFF00, 0x00000043 }, + { 0x0000, 0xfc600309 }, + { 0x006C, 0x00909090 }, + { 0x0064, 0x00070000 }, + { 0x0004, 0x00000489 }, + { 0x0008, 0x0011030f }, + { 0x0010, 0x32302926 }, + { 0x0018, 0x274c0122 }, + { 0x0020, 0x00ce2222 }, + { 0x0014, 0x01001523 }, + { 0x001C, 0x1024010d }, + { 0x0024, 0x00cb2522 }, + { 0x0038, 0xffffff82 }, + { 0x003C, 0x00000000 }, + { 0x0040, 0x00000000 }, + { 0x0044, 0x00000000 }, + { 0x0048, 0x00000000 }, + { 0x004C, 0x00000000 }, + { 0x0050, 0x00000000 }, + { 0x0054, 0x00000000 }, + { 0x0058, 0x00000000 }, + { 0x005C, 0x00000000 }, + { 0x0060, 0x0f2aa02a }, + { 0x0064, 0x003f3005 }, + { 0x0068, 0x02020202 }, + { 0x0070, 0x00000000 }, + { 0x0074, 0x00000000 }, + { 0x0078, 0x00000000 }, + { 0x007C, 0x00000000 }, + { 0x0034, 0x00000001 }, + { 0xFF00, 0x00000043 }, + { 0x002C, 0x00000942 }, + { 0x0030, 0x00000040 }, + { 0x0028, 0x00000005 }, + { 0x0028, 0x00000007 }, + { 0x0028, 0x00000003 }, + { 0x0028, 0x00000001 }, + { 0x000C, 0x00005a08 }, + { 0x002C, 0x00000842 }, + { 0x0028, 0x00000001 }, + { 0x0030, 0x000003c0 }, + { 0x0028, 0x00000003 }, + { 0x0030, 0x00000040 }, + { 0x0028, 0x00000003 }, + { 0x000C, 0x00005a21 }, + { 0x0034, 0x00007c03 }, + { 0x0120, 0x00005061 }, + { 0xffff, 0xffffffff }, +}; + +#endif diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c new file mode 100644 index 000000000000..df0d0a08097a --- /dev/null +++ b/drivers/gpu/drm/ast/ast_drv.c @@ -0,0 +1,245 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ +/* + * Authors: Dave Airlie + */ +#include +#include + +#include +#include + +#include "ast_drv.h" + +int ast_modeset = -1; + +MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); +module_param_named(modeset, ast_modeset, int, 0400); + +#define PCI_VENDOR_ASPEED 0x1a03 + +static struct drm_driver driver; + +#define AST_VGA_DEVICE(id, info) { \ + .class = PCI_BASE_CLASS_DISPLAY << 16, \ + .class_mask = 0xff0000, \ + .vendor = PCI_VENDOR_ASPEED, \ + .device = id, \ + .subvendor = PCI_ANY_ID, \ + .subdevice = PCI_ANY_ID, \ + .driver_data = (unsigned long) info } + +static DEFINE_PCI_DEVICE_TABLE(pciidlist) = { + AST_VGA_DEVICE(PCI_CHIP_AST2000, NULL), + AST_VGA_DEVICE(PCI_CHIP_AST2100, NULL), + /* AST_VGA_DEVICE(PCI_CHIP_AST1180, NULL), - don't bind to 1180 for now */ + {0, 0, 0}, +}; + +MODULE_DEVICE_TABLE(pci, pciidlist); + +static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) +{ + return drm_get_pci_dev(pdev, ent, &driver); +} + +static void +ast_pci_remove(struct pci_dev *pdev) +{ + struct drm_device *dev = pci_get_drvdata(pdev); + + drm_put_dev(dev); +} + + + +static int ast_drm_freeze(struct drm_device *dev) +{ + drm_kms_helper_poll_disable(dev); + + pci_save_state(dev->pdev); + + console_lock(); + ast_fbdev_set_suspend(dev, 1); + console_unlock(); + return 0; +} + +static int ast_drm_thaw(struct drm_device *dev) +{ + int error = 0; + + ast_post_gpu(dev); + + drm_mode_config_reset(dev); + drm_modeset_lock_all(dev); + drm_helper_resume_force_mode(dev); + drm_modeset_unlock_all(dev); + + console_lock(); + ast_fbdev_set_suspend(dev, 0); + console_unlock(); + return error; +} + +static int ast_drm_resume(struct drm_device *dev) +{ + int ret; + + if (pci_enable_device(dev->pdev)) + return -EIO; + + ret = ast_drm_thaw(dev); + if (ret) + return ret; + + drm_kms_helper_poll_enable(dev); + return 0; +} + +static int ast_pm_suspend(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct drm_device *ddev = pci_get_drvdata(pdev); + int error; + + error = ast_drm_freeze(ddev); + if (error) + return error; + + pci_disable_device(pdev); + pci_set_power_state(pdev, PCI_D3hot); + return 0; +} +static int ast_pm_resume(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct drm_device *ddev = pci_get_drvdata(pdev); + return ast_drm_resume(ddev); +} + +static int ast_pm_freeze(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct drm_device *ddev = pci_get_drvdata(pdev); + + if (!ddev || !ddev->dev_private) + return -ENODEV; + return ast_drm_freeze(ddev); + +} + +static int ast_pm_thaw(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct drm_device *ddev = pci_get_drvdata(pdev); + return ast_drm_thaw(ddev); +} + +static int ast_pm_poweroff(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct drm_device *ddev = pci_get_drvdata(pdev); + + return ast_drm_freeze(ddev); +} + +static const struct dev_pm_ops ast_pm_ops = { + .suspend = ast_pm_suspend, + .resume = ast_pm_resume, + .freeze = ast_pm_freeze, + .thaw = ast_pm_thaw, + .poweroff = ast_pm_poweroff, + .restore = ast_pm_resume, +}; + +static struct pci_driver ast_pci_driver = { + .name = DRIVER_NAME, + .id_table = pciidlist, + .probe = ast_pci_probe, + .remove = ast_pci_remove, + .driver.pm = &ast_pm_ops, +}; + +static const struct file_operations ast_fops = { + .owner = THIS_MODULE, + .open = drm_open, + .release = drm_release, + .unlocked_ioctl = drm_ioctl, + .mmap = ast_mmap, + .poll = drm_poll, + .fasync = drm_fasync, +#ifdef CONFIG_COMPAT + .compat_ioctl = drm_compat_ioctl, +#endif + .read = drm_read, +}; + +static struct drm_driver driver = { + .driver_features = DRIVER_USE_MTRR | DRIVER_MODESET | DRIVER_GEM, + .dev_priv_size = 0, + + .load = ast_driver_load, + .unload = ast_driver_unload, + + .fops = &ast_fops, + .name = DRIVER_NAME, + .desc = DRIVER_DESC, + .date = DRIVER_DATE, + .major = DRIVER_MAJOR, + .minor = DRIVER_MINOR, + .patchlevel = DRIVER_PATCHLEVEL, + + .gem_init_object = ast_gem_init_object, + .gem_free_object = ast_gem_free_object, + .dumb_create = ast_dumb_create, + .dumb_map_offset = ast_dumb_mmap_offset, + .dumb_destroy = ast_dumb_destroy, + +}; + +static int __init ast_init(void) +{ +#ifdef CONFIG_VGA_CONSOLE + if (vgacon_text_force() && ast_modeset == -1) + return -EINVAL; +#endif + + if (ast_modeset == 0) + return -EINVAL; + return drm_pci_init(&driver, &ast_pci_driver); +} +static void __exit ast_exit(void) +{ + drm_pci_exit(&driver, &ast_pci_driver); +} + +module_init(ast_init); +module_exit(ast_exit); + +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_LICENSE("GPL and additional rights"); + diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h new file mode 100644 index 000000000000..02e52d543e4b --- /dev/null +++ b/drivers/gpu/drm/ast/ast_drv.h @@ -0,0 +1,359 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ +/* + * Authors: Dave Airlie + */ +#ifndef __AST_DRV_H__ +#define __AST_DRV_H__ + +#include + +#include +#include +#include +#include +#include + +#include +#include + +#define DRIVER_AUTHOR "Dave Airlie" + +#define DRIVER_NAME "ast" +#define DRIVER_DESC "AST" +#define DRIVER_DATE "20120228" + +#define DRIVER_MAJOR 0 +#define DRIVER_MINOR 1 +#define DRIVER_PATCHLEVEL 0 + +#define PCI_CHIP_AST2000 0x2000 +#define PCI_CHIP_AST2100 0x2010 +#define PCI_CHIP_AST1180 0x1180 + + +enum ast_chip { + AST2000, + AST2100, + AST1100, + AST2200, + AST2150, + AST2300, + AST1180, +}; + +#define AST_DRAM_512Mx16 0 +#define AST_DRAM_1Gx16 1 +#define AST_DRAM_512Mx32 2 +#define AST_DRAM_1Gx32 3 +#define AST_DRAM_2Gx16 6 +#define AST_DRAM_4Gx16 7 + +struct ast_fbdev; + +struct ast_private { + struct drm_device *dev; + + void __iomem *regs; + void __iomem *ioregs; + + enum ast_chip chip; + bool vga2_clone; + uint32_t dram_bus_width; + uint32_t dram_type; + uint32_t mclk; + uint32_t vram_size; + + struct ast_fbdev *fbdev; + + int fb_mtrr; + + struct { + struct drm_global_reference mem_global_ref; + struct ttm_bo_global_ref bo_global_ref; + struct ttm_bo_device bdev; + } ttm; + + struct drm_gem_object *cursor_cache; + uint64_t cursor_cache_gpu_addr; + /* Acces to this cache is protected by the crtc->mutex of the only crtc + * we have. */ + struct ttm_bo_kmap_obj cache_kmap; + int next_cursor; +}; + +int ast_driver_load(struct drm_device *dev, unsigned long flags); +int ast_driver_unload(struct drm_device *dev); + +struct ast_gem_object; + +#define AST_IO_AR_PORT_WRITE (0x40) +#define AST_IO_MISC_PORT_WRITE (0x42) +#define AST_IO_SEQ_PORT (0x44) +#define AST_DAC_INDEX_READ (0x3c7) +#define AST_IO_DAC_INDEX_WRITE (0x48) +#define AST_IO_DAC_DATA (0x49) +#define AST_IO_GR_PORT (0x4E) +#define AST_IO_CRTC_PORT (0x54) +#define AST_IO_INPUT_STATUS1_READ (0x5A) +#define AST_IO_MISC_PORT_READ (0x4C) + +#define __ast_read(x) \ +static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \ +u##x val = 0;\ +val = ioread##x(ast->regs + reg); \ +return val;\ +} + +__ast_read(8); +__ast_read(16); +__ast_read(32) + +#define __ast_io_read(x) \ +static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \ +u##x val = 0;\ +val = ioread##x(ast->ioregs + reg); \ +return val;\ +} + +__ast_io_read(8); +__ast_io_read(16); +__ast_io_read(32); + +#define __ast_write(x) \ +static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\ + iowrite##x(val, ast->regs + reg);\ + } + +__ast_write(8); +__ast_write(16); +__ast_write(32); + +#define __ast_io_write(x) \ +static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\ + iowrite##x(val, ast->ioregs + reg);\ + } + +__ast_io_write(8); +__ast_io_write(16); +#undef __ast_io_write + +static inline void ast_set_index_reg(struct ast_private *ast, + uint32_t base, uint8_t index, + uint8_t val) +{ + ast_io_write16(ast, base, ((u16)val << 8) | index); +} + +void ast_set_index_reg_mask(struct ast_private *ast, + uint32_t base, uint8_t index, + uint8_t mask, uint8_t val); +uint8_t ast_get_index_reg(struct ast_private *ast, + uint32_t base, uint8_t index); +uint8_t ast_get_index_reg_mask(struct ast_private *ast, + uint32_t base, uint8_t index, uint8_t mask); + +static inline void ast_open_key(struct ast_private *ast) +{ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xA1, 0xFF, 0x04); +} + +#define AST_VIDMEM_SIZE_8M 0x00800000 +#define AST_VIDMEM_SIZE_16M 0x01000000 +#define AST_VIDMEM_SIZE_32M 0x02000000 +#define AST_VIDMEM_SIZE_64M 0x04000000 +#define AST_VIDMEM_SIZE_128M 0x08000000 + +#define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M + +#define AST_MAX_HWC_WIDTH 64 +#define AST_MAX_HWC_HEIGHT 64 + +#define AST_HWC_SIZE (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2) +#define AST_HWC_SIGNATURE_SIZE 32 + +#define AST_DEFAULT_HWC_NUM 2 +/* define for signature structure */ +#define AST_HWC_SIGNATURE_CHECKSUM 0x00 +#define AST_HWC_SIGNATURE_SizeX 0x04 +#define AST_HWC_SIGNATURE_SizeY 0x08 +#define AST_HWC_SIGNATURE_X 0x0C +#define AST_HWC_SIGNATURE_Y 0x10 +#define AST_HWC_SIGNATURE_HOTSPOTX 0x14 +#define AST_HWC_SIGNATURE_HOTSPOTY 0x18 + + +struct ast_i2c_chan { + struct i2c_adapter adapter; + struct drm_device *dev; + struct i2c_algo_bit_data bit; +}; + +struct ast_connector { + struct drm_connector base; + struct ast_i2c_chan *i2c; +}; + +struct ast_crtc { + struct drm_crtc base; + u8 lut_r[256], lut_g[256], lut_b[256]; + struct drm_gem_object *cursor_bo; + uint64_t cursor_addr; + int cursor_width, cursor_height; + u8 offset_x, offset_y; +}; + +struct ast_encoder { + struct drm_encoder base; +}; + +struct ast_framebuffer { + struct drm_framebuffer base; + struct drm_gem_object *obj; +}; + +struct ast_fbdev { + struct drm_fb_helper helper; + struct ast_framebuffer afb; + struct list_head fbdev_list; + void *sysram; + int size; + struct ttm_bo_kmap_obj mapping; + int x1, y1, x2, y2; /* dirty rect */ + spinlock_t dirty_lock; +}; + +#define to_ast_crtc(x) container_of(x, struct ast_crtc, base) +#define to_ast_connector(x) container_of(x, struct ast_connector, base) +#define to_ast_encoder(x) container_of(x, struct ast_encoder, base) +#define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base) + +struct ast_vbios_stdtable { + u8 misc; + u8 seq[4]; + u8 crtc[25]; + u8 ar[20]; + u8 gr[9]; +}; + +struct ast_vbios_enhtable { + u32 ht; + u32 hde; + u32 hfp; + u32 hsync; + u32 vt; + u32 vde; + u32 vfp; + u32 vsync; + u32 dclk_index; + u32 flags; + u32 refresh_rate; + u32 refresh_rate_index; + u32 mode_id; +}; + +struct ast_vbios_dclk_info { + u8 param1; + u8 param2; + u8 param3; +}; + +struct ast_vbios_mode_info { + struct ast_vbios_stdtable *std_table; + struct ast_vbios_enhtable *enh_table; +}; + +extern int ast_mode_init(struct drm_device *dev); +extern void ast_mode_fini(struct drm_device *dev); + +int ast_framebuffer_init(struct drm_device *dev, + struct ast_framebuffer *ast_fb, + struct drm_mode_fb_cmd2 *mode_cmd, + struct drm_gem_object *obj); + +int ast_fbdev_init(struct drm_device *dev); +void ast_fbdev_fini(struct drm_device *dev); +void ast_fbdev_set_suspend(struct drm_device *dev, int state); + +struct ast_bo { + struct ttm_buffer_object bo; + struct ttm_placement placement; + struct ttm_bo_kmap_obj kmap; + struct drm_gem_object gem; + u32 placements[3]; + int pin_count; +}; +#define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem) + +static inline struct ast_bo * +ast_bo(struct ttm_buffer_object *bo) +{ + return container_of(bo, struct ast_bo, bo); +} + + +#define to_ast_obj(x) container_of(x, struct ast_gem_object, base) + +#define AST_MM_ALIGN_SHIFT 4 +#define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) + +extern int ast_dumb_create(struct drm_file *file, + struct drm_device *dev, + struct drm_mode_create_dumb *args); +extern int ast_dumb_destroy(struct drm_file *file, + struct drm_device *dev, + uint32_t handle); + +extern int ast_gem_init_object(struct drm_gem_object *obj); +extern void ast_gem_free_object(struct drm_gem_object *obj); +extern int ast_dumb_mmap_offset(struct drm_file *file, + struct drm_device *dev, + uint32_t handle, + uint64_t *offset); + +#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) + +int ast_mm_init(struct ast_private *ast); +void ast_mm_fini(struct ast_private *ast); + +int ast_bo_create(struct drm_device *dev, int size, int align, + uint32_t flags, struct ast_bo **pastbo); + +int ast_gem_create(struct drm_device *dev, + u32 size, bool iskernel, + struct drm_gem_object **obj); + +int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr); +int ast_bo_unpin(struct ast_bo *bo); + +int ast_bo_reserve(struct ast_bo *bo, bool no_wait); +void ast_bo_unreserve(struct ast_bo *bo); +void ast_ttm_placement(struct ast_bo *bo, int domain); +int ast_bo_push_sysram(struct ast_bo *bo); +int ast_mmap(struct file *filp, struct vm_area_struct *vma); + +/* ast post */ +void ast_post_gpu(struct drm_device *dev); +#endif diff --git a/drivers/gpu/drm/ast/ast_fb.c b/drivers/gpu/drm/ast/ast_fb.c new file mode 100644 index 000000000000..fbc0823cfa18 --- /dev/null +++ b/drivers/gpu/drm/ast/ast_fb.c @@ -0,0 +1,368 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ +/* + * Authors: Dave Airlie + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#include +#include +#include +#include +#include "ast_drv.h" + +static void ast_dirty_update(struct ast_fbdev *afbdev, + int x, int y, int width, int height) +{ + int i; + struct drm_gem_object *obj; + struct ast_bo *bo; + int src_offset, dst_offset; + int bpp = (afbdev->afb.base.bits_per_pixel + 7)/8; + int ret; + bool unmap = false; + bool store_for_later = false; + int x2, y2; + unsigned long flags; + + obj = afbdev->afb.obj; + bo = gem_to_ast_bo(obj); + + /* + * try and reserve the BO, if we fail with busy + * then the BO is being moved and we should + * store up the damage until later. + */ + ret = ast_bo_reserve(bo, true); + if (ret) { + if (ret != -EBUSY) + return; + + store_for_later = true; + } + + x2 = x + width - 1; + y2 = y + height - 1; + spin_lock_irqsave(&afbdev->dirty_lock, flags); + + if (afbdev->y1 < y) + y = afbdev->y1; + if (afbdev->y2 > y2) + y2 = afbdev->y2; + if (afbdev->x1 < x) + x = afbdev->x1; + if (afbdev->x2 > x2) + x2 = afbdev->x2; + + if (store_for_later) { + afbdev->x1 = x; + afbdev->x2 = x2; + afbdev->y1 = y; + afbdev->y2 = y2; + spin_unlock_irqrestore(&afbdev->dirty_lock, flags); + return; + } + + afbdev->x1 = afbdev->y1 = INT_MAX; + afbdev->x2 = afbdev->y2 = 0; + spin_unlock_irqrestore(&afbdev->dirty_lock, flags); + + if (!bo->kmap.virtual) { + ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap); + if (ret) { + DRM_ERROR("failed to kmap fb updates\n"); + ast_bo_unreserve(bo); + return; + } + unmap = true; + } + for (i = y; i <= y2; i++) { + /* assume equal stride for now */ + src_offset = dst_offset = i * afbdev->afb.base.pitches[0] + (x * bpp); + memcpy_toio(bo->kmap.virtual + src_offset, afbdev->sysram + src_offset, (x2 - x + 1) * bpp); + + } + if (unmap) + ttm_bo_kunmap(&bo->kmap); + + ast_bo_unreserve(bo); +} + +static void ast_fillrect(struct fb_info *info, + const struct fb_fillrect *rect) +{ + struct ast_fbdev *afbdev = info->par; + sys_fillrect(info, rect); + ast_dirty_update(afbdev, rect->dx, rect->dy, rect->width, + rect->height); +} + +static void ast_copyarea(struct fb_info *info, + const struct fb_copyarea *area) +{ + struct ast_fbdev *afbdev = info->par; + sys_copyarea(info, area); + ast_dirty_update(afbdev, area->dx, area->dy, area->width, + area->height); +} + +static void ast_imageblit(struct fb_info *info, + const struct fb_image *image) +{ + struct ast_fbdev *afbdev = info->par; + sys_imageblit(info, image); + ast_dirty_update(afbdev, image->dx, image->dy, image->width, + image->height); +} + +static struct fb_ops astfb_ops = { + .owner = THIS_MODULE, + .fb_check_var = drm_fb_helper_check_var, + .fb_set_par = drm_fb_helper_set_par, + .fb_fillrect = ast_fillrect, + .fb_copyarea = ast_copyarea, + .fb_imageblit = ast_imageblit, + .fb_pan_display = drm_fb_helper_pan_display, + .fb_blank = drm_fb_helper_blank, + .fb_setcmap = drm_fb_helper_setcmap, + .fb_debug_enter = drm_fb_helper_debug_enter, + .fb_debug_leave = drm_fb_helper_debug_leave, +}; + +static int astfb_create_object(struct ast_fbdev *afbdev, + struct drm_mode_fb_cmd2 *mode_cmd, + struct drm_gem_object **gobj_p) +{ + struct drm_device *dev = afbdev->helper.dev; + u32 bpp, depth; + u32 size; + struct drm_gem_object *gobj; + + int ret = 0; + drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp); + + size = mode_cmd->pitches[0] * mode_cmd->height; + ret = ast_gem_create(dev, size, true, &gobj); + if (ret) + return ret; + + *gobj_p = gobj; + return ret; +} + +static int astfb_create(struct drm_fb_helper *helper, + struct drm_fb_helper_surface_size *sizes) +{ + struct ast_fbdev *afbdev = (struct ast_fbdev *)helper; + struct drm_device *dev = afbdev->helper.dev; + struct drm_mode_fb_cmd2 mode_cmd; + struct drm_framebuffer *fb; + struct fb_info *info; + int size, ret; + struct device *device = &dev->pdev->dev; + void *sysram; + struct drm_gem_object *gobj = NULL; + struct ast_bo *bo = NULL; + mode_cmd.width = sizes->surface_width; + mode_cmd.height = sizes->surface_height; + mode_cmd.pitches[0] = mode_cmd.width * ((sizes->surface_bpp + 7)/8); + + mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, + sizes->surface_depth); + + size = mode_cmd.pitches[0] * mode_cmd.height; + + ret = astfb_create_object(afbdev, &mode_cmd, &gobj); + if (ret) { + DRM_ERROR("failed to create fbcon backing object %d\n", ret); + return ret; + } + bo = gem_to_ast_bo(gobj); + + sysram = vmalloc(size); + if (!sysram) + return -ENOMEM; + + info = framebuffer_alloc(0, device); + if (!info) { + ret = -ENOMEM; + goto out; + } + info->par = afbdev; + + ret = ast_framebuffer_init(dev, &afbdev->afb, &mode_cmd, gobj); + if (ret) + goto out; + + afbdev->sysram = sysram; + afbdev->size = size; + + fb = &afbdev->afb.base; + afbdev->helper.fb = fb; + afbdev->helper.fbdev = info; + + strcpy(info->fix.id, "astdrmfb"); + + info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT; + info->fbops = &astfb_ops; + + ret = fb_alloc_cmap(&info->cmap, 256, 0); + if (ret) { + ret = -ENOMEM; + goto out; + } + + info->apertures = alloc_apertures(1); + if (!info->apertures) { + ret = -ENOMEM; + goto out; + } + info->apertures->ranges[0].base = pci_resource_start(dev->pdev, 0); + info->apertures->ranges[0].size = pci_resource_len(dev->pdev, 0); + + drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth); + drm_fb_helper_fill_var(info, &afbdev->helper, sizes->fb_width, sizes->fb_height); + + info->screen_base = sysram; + info->screen_size = size; + + info->pixmap.flags = FB_PIXMAP_SYSTEM; + + DRM_DEBUG_KMS("allocated %dx%d\n", + fb->width, fb->height); + + return 0; +out: + return ret; +} + +static void ast_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, + u16 blue, int regno) +{ + struct ast_crtc *ast_crtc = to_ast_crtc(crtc); + ast_crtc->lut_r[regno] = red >> 8; + ast_crtc->lut_g[regno] = green >> 8; + ast_crtc->lut_b[regno] = blue >> 8; +} + +static void ast_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, + u16 *blue, int regno) +{ + struct ast_crtc *ast_crtc = to_ast_crtc(crtc); + *red = ast_crtc->lut_r[regno] << 8; + *green = ast_crtc->lut_g[regno] << 8; + *blue = ast_crtc->lut_b[regno] << 8; +} + +static struct drm_fb_helper_funcs ast_fb_helper_funcs = { + .gamma_set = ast_fb_gamma_set, + .gamma_get = ast_fb_gamma_get, + .fb_probe = astfb_create, +}; + +static void ast_fbdev_destroy(struct drm_device *dev, + struct ast_fbdev *afbdev) +{ + struct fb_info *info; + struct ast_framebuffer *afb = &afbdev->afb; + if (afbdev->helper.fbdev) { + info = afbdev->helper.fbdev; + unregister_framebuffer(info); + if (info->cmap.len) + fb_dealloc_cmap(&info->cmap); + framebuffer_release(info); + } + + if (afb->obj) { + drm_gem_object_unreference_unlocked(afb->obj); + afb->obj = NULL; + } + drm_fb_helper_fini(&afbdev->helper); + + vfree(afbdev->sysram); + drm_framebuffer_unregister_private(&afb->base); + drm_framebuffer_cleanup(&afb->base); +} + +int ast_fbdev_init(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + struct ast_fbdev *afbdev; + int ret; + + afbdev = kzalloc(sizeof(struct ast_fbdev), GFP_KERNEL); + if (!afbdev) + return -ENOMEM; + + ast->fbdev = afbdev; + afbdev->helper.funcs = &ast_fb_helper_funcs; + spin_lock_init(&afbdev->dirty_lock); + ret = drm_fb_helper_init(dev, &afbdev->helper, + 1, 1); + if (ret) { + kfree(afbdev); + return ret; + } + + drm_fb_helper_single_add_all_connectors(&afbdev->helper); + + /* disable all the possible outputs/crtcs before entering KMS mode */ + drm_helper_disable_unused_functions(dev); + + drm_fb_helper_initial_config(&afbdev->helper, 32); + return 0; +} + +void ast_fbdev_fini(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + + if (!ast->fbdev) + return; + + ast_fbdev_destroy(dev, ast->fbdev); + kfree(ast->fbdev); + ast->fbdev = NULL; +} + +void ast_fbdev_set_suspend(struct drm_device *dev, int state) +{ + struct ast_private *ast = dev->dev_private; + + if (!ast->fbdev) + return; + + fb_set_suspend(ast->fbdev->helper.fbdev, state); +} diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c new file mode 100644 index 000000000000..f60fd7bd1183 --- /dev/null +++ b/drivers/gpu/drm/ast/ast_main.c @@ -0,0 +1,519 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ +/* + * Authors: Dave Airlie + */ +#include +#include "ast_drv.h" + + +#include +#include + +#include "ast_dram_tables.h" + +void ast_set_index_reg_mask(struct ast_private *ast, + uint32_t base, uint8_t index, + uint8_t mask, uint8_t val) +{ + u8 tmp; + ast_io_write8(ast, base, index); + tmp = (ast_io_read8(ast, base + 1) & mask) | val; + ast_set_index_reg(ast, base, index, tmp); +} + +uint8_t ast_get_index_reg(struct ast_private *ast, + uint32_t base, uint8_t index) +{ + uint8_t ret; + ast_io_write8(ast, base, index); + ret = ast_io_read8(ast, base + 1); + return ret; +} + +uint8_t ast_get_index_reg_mask(struct ast_private *ast, + uint32_t base, uint8_t index, uint8_t mask) +{ + uint8_t ret; + ast_io_write8(ast, base, index); + ret = ast_io_read8(ast, base + 1) & mask; + return ret; +} + + +static int ast_detect_chip(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + + if (dev->pdev->device == PCI_CHIP_AST1180) { + ast->chip = AST1100; + DRM_INFO("AST 1180 detected\n"); + } else { + if (dev->pdev->revision >= 0x20) { + ast->chip = AST2300; + DRM_INFO("AST 2300 detected\n"); + } else if (dev->pdev->revision >= 0x10) { + uint32_t data; + ast_write32(ast, 0xf004, 0x1e6e0000); + ast_write32(ast, 0xf000, 0x1); + + data = ast_read32(ast, 0x1207c); + switch (data & 0x0300) { + case 0x0200: + ast->chip = AST1100; + DRM_INFO("AST 1100 detected\n"); + break; + case 0x0100: + ast->chip = AST2200; + DRM_INFO("AST 2200 detected\n"); + break; + case 0x0000: + ast->chip = AST2150; + DRM_INFO("AST 2150 detected\n"); + break; + default: + ast->chip = AST2100; + DRM_INFO("AST 2100 detected\n"); + break; + } + ast->vga2_clone = false; + } else { + ast->chip = 2000; + DRM_INFO("AST 2000 detected\n"); + } + } + return 0; +} + +static int ast_get_dram_info(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + uint32_t data, data2; + uint32_t denum, num, div, ref_pll; + + ast_write32(ast, 0xf004, 0x1e6e0000); + ast_write32(ast, 0xf000, 0x1); + + + ast_write32(ast, 0x10000, 0xfc600309); + + do { + ; + } while (ast_read32(ast, 0x10000) != 0x01); + data = ast_read32(ast, 0x10004); + + if (data & 0x400) + ast->dram_bus_width = 16; + else + ast->dram_bus_width = 32; + + if (ast->chip == AST2300) { + switch (data & 0x03) { + case 0: + ast->dram_type = AST_DRAM_512Mx16; + break; + default: + case 1: + ast->dram_type = AST_DRAM_1Gx16; + break; + case 2: + ast->dram_type = AST_DRAM_2Gx16; + break; + case 3: + ast->dram_type = AST_DRAM_4Gx16; + break; + } + } else { + switch (data & 0x0c) { + case 0: + case 4: + ast->dram_type = AST_DRAM_512Mx16; + break; + case 8: + if (data & 0x40) + ast->dram_type = AST_DRAM_1Gx16; + else + ast->dram_type = AST_DRAM_512Mx32; + break; + case 0xc: + ast->dram_type = AST_DRAM_1Gx32; + break; + } + } + + data = ast_read32(ast, 0x10120); + data2 = ast_read32(ast, 0x10170); + if (data2 & 0x2000) + ref_pll = 14318; + else + ref_pll = 12000; + + denum = data & 0x1f; + num = (data & 0x3fe0) >> 5; + data = (data & 0xc000) >> 14; + switch (data) { + case 3: + div = 0x4; + break; + case 2: + case 1: + div = 0x2; + break; + default: + div = 0x1; + break; + } + ast->mclk = ref_pll * (num + 2) / (denum + 2) * (div * 1000); + return 0; +} + +uint32_t ast_get_max_dclk(struct drm_device *dev, int bpp) +{ + struct ast_private *ast = dev->dev_private; + uint32_t dclk, jreg; + uint32_t dram_bus_width, mclk, dram_bandwidth, actual_dram_bandwidth, dram_efficency = 500; + + dram_bus_width = ast->dram_bus_width; + mclk = ast->mclk; + + if (ast->chip == AST2100 || + ast->chip == AST1100 || + ast->chip == AST2200 || + ast->chip == AST2150 || + ast->dram_bus_width == 16) + dram_efficency = 600; + else if (ast->chip == AST2300) + dram_efficency = 400; + + dram_bandwidth = mclk * dram_bus_width * 2 / 8; + actual_dram_bandwidth = dram_bandwidth * dram_efficency / 1000; + + if (ast->chip == AST1180) + dclk = actual_dram_bandwidth / ((bpp + 1) / 8); + else { + jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); + if ((jreg & 0x08) && (ast->chip == AST2000)) + dclk = actual_dram_bandwidth / ((bpp + 1 + 16) / 8); + else if ((jreg & 0x08) && (bpp == 8)) + dclk = actual_dram_bandwidth / ((bpp + 1 + 24) / 8); + else + dclk = actual_dram_bandwidth / ((bpp + 1) / 8); + } + + if (ast->chip == AST2100 || + ast->chip == AST2200 || + ast->chip == AST2300 || + ast->chip == AST1180) { + if (dclk > 200) + dclk = 200; + } else { + if (dclk > 165) + dclk = 165; + } + + return dclk; +} + +static void ast_user_framebuffer_destroy(struct drm_framebuffer *fb) +{ + struct ast_framebuffer *ast_fb = to_ast_framebuffer(fb); + if (ast_fb->obj) + drm_gem_object_unreference_unlocked(ast_fb->obj); + + drm_framebuffer_cleanup(fb); + kfree(fb); +} + +static const struct drm_framebuffer_funcs ast_fb_funcs = { + .destroy = ast_user_framebuffer_destroy, +}; + + +int ast_framebuffer_init(struct drm_device *dev, + struct ast_framebuffer *ast_fb, + struct drm_mode_fb_cmd2 *mode_cmd, + struct drm_gem_object *obj) +{ + int ret; + + drm_helper_mode_fill_fb_struct(&ast_fb->base, mode_cmd); + ast_fb->obj = obj; + ret = drm_framebuffer_init(dev, &ast_fb->base, &ast_fb_funcs); + if (ret) { + DRM_ERROR("framebuffer init failed %d\n", ret); + return ret; + } + return 0; +} + +static struct drm_framebuffer * +ast_user_framebuffer_create(struct drm_device *dev, + struct drm_file *filp, + struct drm_mode_fb_cmd2 *mode_cmd) +{ + struct drm_gem_object *obj; + struct ast_framebuffer *ast_fb; + int ret; + + obj = drm_gem_object_lookup(dev, filp, mode_cmd->handles[0]); + if (obj == NULL) + return ERR_PTR(-ENOENT); + + ast_fb = kzalloc(sizeof(*ast_fb), GFP_KERNEL); + if (!ast_fb) { + drm_gem_object_unreference_unlocked(obj); + return ERR_PTR(-ENOMEM); + } + + ret = ast_framebuffer_init(dev, ast_fb, mode_cmd, obj); + if (ret) { + drm_gem_object_unreference_unlocked(obj); + kfree(ast_fb); + return ERR_PTR(ret); + } + return &ast_fb->base; +} + +static const struct drm_mode_config_funcs ast_mode_funcs = { + .fb_create = ast_user_framebuffer_create, +}; + +static u32 ast_get_vram_info(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + u8 jreg; + + ast_open_key(ast); + + jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff); + switch (jreg & 3) { + case 0: return AST_VIDMEM_SIZE_8M; + case 1: return AST_VIDMEM_SIZE_16M; + case 2: return AST_VIDMEM_SIZE_32M; + case 3: return AST_VIDMEM_SIZE_64M; + } + return AST_VIDMEM_DEFAULT_SIZE; +} + +int ast_driver_load(struct drm_device *dev, unsigned long flags) +{ + struct ast_private *ast; + int ret = 0; + + ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL); + if (!ast) + return -ENOMEM; + + dev->dev_private = ast; + ast->dev = dev; + + ast->regs = pci_iomap(dev->pdev, 1, 0); + if (!ast->regs) { + ret = -EIO; + goto out_free; + } + ast->ioregs = pci_iomap(dev->pdev, 2, 0); + if (!ast->ioregs) { + ret = -EIO; + goto out_free; + } + + ast_detect_chip(dev); + + if (ast->chip != AST1180) { + ast_get_dram_info(dev); + ast->vram_size = ast_get_vram_info(dev); + DRM_INFO("dram %d %d %d %08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size); + } + + ret = ast_mm_init(ast); + if (ret) + goto out_free; + + drm_mode_config_init(dev); + + dev->mode_config.funcs = (void *)&ast_mode_funcs; + dev->mode_config.min_width = 0; + dev->mode_config.min_height = 0; + dev->mode_config.preferred_depth = 24; + dev->mode_config.prefer_shadow = 1; + + if (ast->chip == AST2100 || + ast->chip == AST2200 || + ast->chip == AST2300 || + ast->chip == AST1180) { + dev->mode_config.max_width = 1920; + dev->mode_config.max_height = 2048; + } else { + dev->mode_config.max_width = 1600; + dev->mode_config.max_height = 1200; + } + + ret = ast_mode_init(dev); + if (ret) + goto out_free; + + ret = ast_fbdev_init(dev); + if (ret) + goto out_free; + + return 0; +out_free: + kfree(ast); + dev->dev_private = NULL; + return ret; +} + +int ast_driver_unload(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + + ast_mode_fini(dev); + ast_fbdev_fini(dev); + drm_mode_config_cleanup(dev); + + ast_mm_fini(ast); + pci_iounmap(dev->pdev, ast->ioregs); + pci_iounmap(dev->pdev, ast->regs); + kfree(ast); + return 0; +} + +int ast_gem_create(struct drm_device *dev, + u32 size, bool iskernel, + struct drm_gem_object **obj) +{ + struct ast_bo *astbo; + int ret; + + *obj = NULL; + + size = roundup(size, PAGE_SIZE); + if (size == 0) + return -EINVAL; + + ret = ast_bo_create(dev, size, 0, 0, &astbo); + if (ret) { + if (ret != -ERESTARTSYS) + DRM_ERROR("failed to allocate GEM object\n"); + return ret; + } + *obj = &astbo->gem; + return 0; +} + +int ast_dumb_create(struct drm_file *file, + struct drm_device *dev, + struct drm_mode_create_dumb *args) +{ + int ret; + struct drm_gem_object *gobj; + u32 handle; + + args->pitch = args->width * ((args->bpp + 7) / 8); + args->size = args->pitch * args->height; + + ret = ast_gem_create(dev, args->size, false, + &gobj); + if (ret) + return ret; + + ret = drm_gem_handle_create(file, gobj, &handle); + drm_gem_object_unreference_unlocked(gobj); + if (ret) + return ret; + + args->handle = handle; + return 0; +} + +int ast_dumb_destroy(struct drm_file *file, + struct drm_device *dev, + uint32_t handle) +{ + return drm_gem_handle_delete(file, handle); +} + +int ast_gem_init_object(struct drm_gem_object *obj) +{ + BUG(); + return 0; +} + +void ast_bo_unref(struct ast_bo **bo) +{ + struct ttm_buffer_object *tbo; + + if ((*bo) == NULL) + return; + + tbo = &((*bo)->bo); + ttm_bo_unref(&tbo); + if (tbo == NULL) + *bo = NULL; + +} +void ast_gem_free_object(struct drm_gem_object *obj) +{ + struct ast_bo *ast_bo = gem_to_ast_bo(obj); + + if (!ast_bo) + return; + ast_bo_unref(&ast_bo); +} + + +static inline u64 ast_bo_mmap_offset(struct ast_bo *bo) +{ + return bo->bo.addr_space_offset; +} +int +ast_dumb_mmap_offset(struct drm_file *file, + struct drm_device *dev, + uint32_t handle, + uint64_t *offset) +{ + struct drm_gem_object *obj; + int ret; + struct ast_bo *bo; + + mutex_lock(&dev->struct_mutex); + obj = drm_gem_object_lookup(dev, file, handle); + if (obj == NULL) { + ret = -ENOENT; + goto out_unlock; + } + + bo = gem_to_ast_bo(obj); + *offset = ast_bo_mmap_offset(bo); + + drm_gem_object_unreference(obj); + ret = 0; +out_unlock: + mutex_unlock(&dev->struct_mutex); + return ret; + +} + diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c new file mode 100644 index 000000000000..7fc9f7272b56 --- /dev/null +++ b/drivers/gpu/drm/ast/ast_mode.c @@ -0,0 +1,1160 @@ +/* + * Copyright 2012 Red Hat Inc. + * Parts based on xf86-video-ast + * Copyright (c) 2005 ASPEED Technology Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ +/* + * Authors: Dave Airlie + */ +#include +#include +#include +#include +#include "ast_drv.h" + +#include "ast_tables.h" + +static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev); +static void ast_i2c_destroy(struct ast_i2c_chan *i2c); +static int ast_cursor_set(struct drm_crtc *crtc, + struct drm_file *file_priv, + uint32_t handle, + uint32_t width, + uint32_t height); +static int ast_cursor_move(struct drm_crtc *crtc, + int x, int y); + +static inline void ast_load_palette_index(struct ast_private *ast, + u8 index, u8 red, u8 green, + u8 blue) +{ + ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index); + ast_io_read8(ast, AST_IO_SEQ_PORT); + ast_io_write8(ast, AST_IO_DAC_DATA, red); + ast_io_read8(ast, AST_IO_SEQ_PORT); + ast_io_write8(ast, AST_IO_DAC_DATA, green); + ast_io_read8(ast, AST_IO_SEQ_PORT); + ast_io_write8(ast, AST_IO_DAC_DATA, blue); + ast_io_read8(ast, AST_IO_SEQ_PORT); +} + +static void ast_crtc_load_lut(struct drm_crtc *crtc) +{ + struct ast_private *ast = crtc->dev->dev_private; + struct ast_crtc *ast_crtc = to_ast_crtc(crtc); + int i; + + if (!crtc->enabled) + return; + + for (i = 0; i < 256; i++) + ast_load_palette_index(ast, i, ast_crtc->lut_r[i], + ast_crtc->lut_g[i], ast_crtc->lut_b[i]); +} + +static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode, + struct ast_vbios_mode_info *vbios_mode) +{ + struct ast_private *ast = crtc->dev->dev_private; + u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate; + u32 hborder, vborder; + + switch (crtc->fb->bits_per_pixel) { + case 8: + vbios_mode->std_table = &vbios_stdtable[VGAModeIndex]; + color_index = VGAModeIndex - 1; + break; + case 16: + vbios_mode->std_table = &vbios_stdtable[HiCModeIndex]; + color_index = HiCModeIndex; + break; + case 24: + case 32: + vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex]; + color_index = TrueCModeIndex; + break; + default: + return false; + } + + switch (crtc->mode.crtc_hdisplay) { + case 640: + vbios_mode->enh_table = &res_640x480[refresh_rate_index]; + break; + case 800: + vbios_mode->enh_table = &res_800x600[refresh_rate_index]; + break; + case 1024: + vbios_mode->enh_table = &res_1024x768[refresh_rate_index]; + break; + case 1280: + if (crtc->mode.crtc_vdisplay == 800) + vbios_mode->enh_table = &res_1280x800[refresh_rate_index]; + else + vbios_mode->enh_table = &res_1280x1024[refresh_rate_index]; + break; + case 1440: + vbios_mode->enh_table = &res_1440x900[refresh_rate_index]; + break; + case 1600: + vbios_mode->enh_table = &res_1600x1200[refresh_rate_index]; + break; + case 1680: + vbios_mode->enh_table = &res_1680x1050[refresh_rate_index]; + break; + case 1920: + if (crtc->mode.crtc_vdisplay == 1080) + vbios_mode->enh_table = &res_1920x1080[refresh_rate_index]; + else + vbios_mode->enh_table = &res_1920x1200[refresh_rate_index]; + break; + default: + return false; + } + + refresh_rate = drm_mode_vrefresh(mode); + while (vbios_mode->enh_table->refresh_rate < refresh_rate) { + vbios_mode->enh_table++; + if ((vbios_mode->enh_table->refresh_rate > refresh_rate) || + (vbios_mode->enh_table->refresh_rate == 0xff)) { + vbios_mode->enh_table--; + break; + } + } + + hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0; + vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0; + + adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht; + adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder; + adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder; + adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder + + vbios_mode->enh_table->hfp; + adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder + + vbios_mode->enh_table->hfp + + vbios_mode->enh_table->hsync); + + adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt; + adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder; + adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder; + adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder + + vbios_mode->enh_table->vfp; + adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder + + vbios_mode->enh_table->vfp + + vbios_mode->enh_table->vsync); + + refresh_rate_index = vbios_mode->enh_table->refresh_rate_index; + mode_id = vbios_mode->enh_table->mode_id; + + if (ast->chip == AST1180) { + /* TODO 1180 */ + } else { + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4)); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff); + + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, crtc->fb->bits_per_pixel); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8); + + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8); + } + + return true; + + +} +static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, + struct ast_vbios_mode_info *vbios_mode) +{ + struct ast_private *ast = crtc->dev->dev_private; + struct ast_vbios_stdtable *stdtable; + u32 i; + u8 jreg; + + stdtable = vbios_mode->std_table; + + jreg = stdtable->misc; + ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); + + /* Set SEQ */ + ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03); + for (i = 0; i < 4; i++) { + jreg = stdtable->seq[i]; + if (!i) + jreg |= 0x20; + ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg); + } + + /* Set CRTC */ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); + for (i = 0; i < 25; i++) + ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); + + /* set AR */ + jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); + for (i = 0; i < 20; i++) { + jreg = stdtable->ar[i]; + ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i); + ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg); + } + ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14); + ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00); + + jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); + ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20); + + /* Set GR */ + for (i = 0; i < 9; i++) + ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]); +} + +static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, + struct ast_vbios_mode_info *vbios_mode) +{ + struct ast_private *ast = crtc->dev->dev_private; + u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; + u16 temp; + + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); + + temp = (mode->crtc_htotal >> 3) - 5; + if (temp & 0x100) + jregAC |= 0x01; /* HT D[8] */ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp); + + temp = (mode->crtc_hdisplay >> 3) - 1; + if (temp & 0x100) + jregAC |= 0x04; /* HDE D[8] */ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp); + + temp = (mode->crtc_hblank_start >> 3) - 1; + if (temp & 0x100) + jregAC |= 0x10; /* HBS D[8] */ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp); + + temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; + if (temp & 0x20) + jreg05 |= 0x80; /* HBE D[5] */ + if (temp & 0x40) + jregAD |= 0x01; /* HBE D[5] */ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f)); + + temp = (mode->crtc_hsync_start >> 3) - 1; + if (temp & 0x100) + jregAC |= 0x40; /* HRS D[5] */ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp); + + temp = ((mode->crtc_hsync_end >> 3) - 1) & 0x3f; + if (temp & 0x20) + jregAD |= 0x04; /* HRE D[5] */ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); + + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC); + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD); + + /* vert timings */ + temp = (mode->crtc_vtotal) - 2; + if (temp & 0x100) + jreg07 |= 0x01; + if (temp & 0x200) + jreg07 |= 0x20; + if (temp & 0x400) + jregAE |= 0x01; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp); + + temp = (mode->crtc_vsync_start) - 1; + if (temp & 0x100) + jreg07 |= 0x04; + if (temp & 0x200) + jreg07 |= 0x80; + if (temp & 0x400) + jregAE |= 0x08; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp); + + temp = (mode->crtc_vsync_end - 1) & 0x3f; + if (temp & 0x10) + jregAE |= 0x20; + if (temp & 0x20) + jregAE |= 0x40; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf); + + temp = mode->crtc_vdisplay - 1; + if (temp & 0x100) + jreg07 |= 0x02; + if (temp & 0x200) + jreg07 |= 0x40; + if (temp & 0x400) + jregAE |= 0x02; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp); + + temp = mode->crtc_vblank_start - 1; + if (temp & 0x100) + jreg07 |= 0x08; + if (temp & 0x200) + jreg09 |= 0x20; + if (temp & 0x400) + jregAE |= 0x04; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp); + + temp = mode->crtc_vblank_end - 1; + if (temp & 0x100) + jregAE |= 0x10; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp); + + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07); + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09); + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80)); + + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80); +} + +static void ast_set_offset_reg(struct drm_crtc *crtc) +{ + struct ast_private *ast = crtc->dev->dev_private; + + u16 offset; + + offset = crtc->fb->pitches[0] >> 3; + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff)); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f); +} + +static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode, + struct ast_vbios_mode_info *vbios_mode) +{ + struct ast_private *ast = dev->dev_private; + struct ast_vbios_dclk_info *clk_info; + + clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; + + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1); + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2); + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f, + (clk_info->param3 & 0x80) | ((clk_info->param3 & 0x3) << 4)); +} + +static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, + struct ast_vbios_mode_info *vbios_mode) +{ + struct ast_private *ast = crtc->dev->dev_private; + u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; + + switch (crtc->fb->bits_per_pixel) { + case 8: + jregA0 = 0x70; + jregA3 = 0x01; + jregA8 = 0x00; + break; + case 15: + case 16: + jregA0 = 0x70; + jregA3 = 0x04; + jregA8 = 0x02; + break; + case 32: + jregA0 = 0x70; + jregA3 = 0x08; + jregA8 = 0x02; + break; + } + + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0); + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3); + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8); + + /* Set Threshold */ + if (ast->chip == AST2300) { + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60); + } else if (ast->chip == AST2100 || + ast->chip == AST1100 || + ast->chip == AST2200 || + ast->chip == AST2150) { + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f); + } else { + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f); + } +} + +void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode, + struct ast_vbios_mode_info *vbios_mode) +{ + struct ast_private *ast = dev->dev_private; + u8 jreg; + + jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ); + jreg |= (vbios_mode->enh_table->flags & SyncNN); + ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); +} + +bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, + struct ast_vbios_mode_info *vbios_mode) +{ + switch (crtc->fb->bits_per_pixel) { + case 8: + break; + default: + return false; + } + return true; +} + +void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset) +{ + struct ast_private *ast = crtc->dev->dev_private; + u32 addr; + + addr = offset >> 2; + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff)); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff)); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff)); + +} + +static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) +{ + struct ast_private *ast = crtc->dev->dev_private; + + if (ast->chip == AST1180) + return; + + switch (mode) { + case DRM_MODE_DPMS_ON: + case DRM_MODE_DPMS_STANDBY: + case DRM_MODE_DPMS_SUSPEND: + ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0); + ast_crtc_load_lut(crtc); + break; + case DRM_MODE_DPMS_OFF: + ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20); + break; + } +} + +static bool ast_crtc_mode_fixup(struct drm_crtc *crtc, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + return true; +} + +/* ast is different - we will force move buffers out of VRAM */ +static int ast_crtc_do_set_base(struct drm_crtc *crtc, + struct drm_framebuffer *fb, + int x, int y, int atomic) +{ + struct ast_private *ast = crtc->dev->dev_private; + struct drm_gem_object *obj; + struct ast_framebuffer *ast_fb; + struct ast_bo *bo; + int ret; + u64 gpu_addr; + + /* push the previous fb to system ram */ + if (!atomic && fb) { + ast_fb = to_ast_framebuffer(fb); + obj = ast_fb->obj; + bo = gem_to_ast_bo(obj); + ret = ast_bo_reserve(bo, false); + if (ret) + return ret; + ast_bo_push_sysram(bo); + ast_bo_unreserve(bo); + } + + ast_fb = to_ast_framebuffer(crtc->fb); + obj = ast_fb->obj; + bo = gem_to_ast_bo(obj); + + ret = ast_bo_reserve(bo, false); + if (ret) + return ret; + + ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); + if (ret) { + ast_bo_unreserve(bo); + return ret; + } + + if (&ast->fbdev->afb == ast_fb) { + /* if pushing console in kmap it */ + ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap); + if (ret) + DRM_ERROR("failed to kmap fbcon\n"); + } + ast_bo_unreserve(bo); + + ast_set_start_address_crt1(crtc, (u32)gpu_addr); + + return 0; +} + +static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, + struct drm_framebuffer *old_fb) +{ + return ast_crtc_do_set_base(crtc, old_fb, x, y, 0); +} + +static int ast_crtc_mode_set(struct drm_crtc *crtc, + struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode, + int x, int y, + struct drm_framebuffer *old_fb) +{ + struct drm_device *dev = crtc->dev; + struct ast_private *ast = crtc->dev->dev_private; + struct ast_vbios_mode_info vbios_mode; + bool ret; + if (ast->chip == AST1180) { + DRM_ERROR("AST 1180 modesetting not supported\n"); + return -EINVAL; + } + + ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode); + if (ret == false) + return -EINVAL; + ast_open_key(ast); + + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04); + + ast_set_std_reg(crtc, adjusted_mode, &vbios_mode); + ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode); + ast_set_offset_reg(crtc); + ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode); + ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode); + ast_set_sync_reg(dev, adjusted_mode, &vbios_mode); + ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode); + + ast_crtc_mode_set_base(crtc, x, y, old_fb); + + return 0; +} + +static void ast_crtc_disable(struct drm_crtc *crtc) +{ + +} + +static void ast_crtc_prepare(struct drm_crtc *crtc) +{ + +} + +static void ast_crtc_commit(struct drm_crtc *crtc) +{ + struct ast_private *ast = crtc->dev->dev_private; + ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0); +} + + +static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { + .dpms = ast_crtc_dpms, + .mode_fixup = ast_crtc_mode_fixup, + .mode_set = ast_crtc_mode_set, + .mode_set_base = ast_crtc_mode_set_base, + .disable = ast_crtc_disable, + .load_lut = ast_crtc_load_lut, + .prepare = ast_crtc_prepare, + .commit = ast_crtc_commit, + +}; + +static void ast_crtc_reset(struct drm_crtc *crtc) +{ + +} + +static void ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, + u16 *blue, uint32_t start, uint32_t size) +{ + struct ast_crtc *ast_crtc = to_ast_crtc(crtc); + int end = (start + size > 256) ? 256 : start + size, i; + + /* userspace palettes are always correct as is */ + for (i = start; i < end; i++) { + ast_crtc->lut_r[i] = red[i] >> 8; + ast_crtc->lut_g[i] = green[i] >> 8; + ast_crtc->lut_b[i] = blue[i] >> 8; + } + ast_crtc_load_lut(crtc); +} + + +static void ast_crtc_destroy(struct drm_crtc *crtc) +{ + drm_crtc_cleanup(crtc); + kfree(crtc); +} + +static const struct drm_crtc_funcs ast_crtc_funcs = { + .cursor_set = ast_cursor_set, + .cursor_move = ast_cursor_move, + .reset = ast_crtc_reset, + .set_config = drm_crtc_helper_set_config, + .gamma_set = ast_crtc_gamma_set, + .destroy = ast_crtc_destroy, +}; + +int ast_crtc_init(struct drm_device *dev) +{ + struct ast_crtc *crtc; + int i; + + crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL); + if (!crtc) + return -ENOMEM; + + drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs); + drm_mode_crtc_set_gamma_size(&crtc->base, 256); + drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs); + + for (i = 0; i < 256; i++) { + crtc->lut_r[i] = i; + crtc->lut_g[i] = i; + crtc->lut_b[i] = i; + } + return 0; +} + +static void ast_encoder_destroy(struct drm_encoder *encoder) +{ + drm_encoder_cleanup(encoder); + kfree(encoder); +} + + +static struct drm_encoder *ast_best_single_encoder(struct drm_connector *connector) +{ + int enc_id = connector->encoder_ids[0]; + struct drm_mode_object *obj; + struct drm_encoder *encoder; + + /* pick the encoder ids */ + if (enc_id) { + obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); + if (!obj) + return NULL; + encoder = obj_to_encoder(obj); + return encoder; + } + return NULL; +} + + +static const struct drm_encoder_funcs ast_enc_funcs = { + .destroy = ast_encoder_destroy, +}; + +static void ast_encoder_dpms(struct drm_encoder *encoder, int mode) +{ + +} + +static bool ast_mode_fixup(struct drm_encoder *encoder, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + return true; +} + +static void ast_encoder_mode_set(struct drm_encoder *encoder, + struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ +} + +static void ast_encoder_prepare(struct drm_encoder *encoder) +{ + +} + +static void ast_encoder_commit(struct drm_encoder *encoder) +{ + +} + + +static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = { + .dpms = ast_encoder_dpms, + .mode_fixup = ast_mode_fixup, + .prepare = ast_encoder_prepare, + .commit = ast_encoder_commit, + .mode_set = ast_encoder_mode_set, +}; + +int ast_encoder_init(struct drm_device *dev) +{ + struct ast_encoder *ast_encoder; + + ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL); + if (!ast_encoder) + return -ENOMEM; + + drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs, + DRM_MODE_ENCODER_DAC); + drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs); + + ast_encoder->base.possible_crtcs = 1; + return 0; +} + +static int ast_get_modes(struct drm_connector *connector) +{ + struct ast_connector *ast_connector = to_ast_connector(connector); + struct edid *edid; + int ret; + + edid = drm_get_edid(connector, &ast_connector->i2c->adapter); + if (edid) { + drm_mode_connector_update_edid_property(&ast_connector->base, edid); + ret = drm_add_edid_modes(connector, edid); + kfree(edid); + return ret; + } else + drm_mode_connector_update_edid_property(&ast_connector->base, NULL); + return 0; +} + +static int ast_mode_valid(struct drm_connector *connector, + struct drm_display_mode *mode) +{ + return MODE_OK; +} + +static void ast_connector_destroy(struct drm_connector *connector) +{ + struct ast_connector *ast_connector = to_ast_connector(connector); + ast_i2c_destroy(ast_connector->i2c); + drm_sysfs_connector_remove(connector); + drm_connector_cleanup(connector); + kfree(connector); +} + +static enum drm_connector_status +ast_connector_detect(struct drm_connector *connector, bool force) +{ + return connector_status_connected; +} + +static const struct drm_connector_helper_funcs ast_connector_helper_funcs = { + .mode_valid = ast_mode_valid, + .get_modes = ast_get_modes, + .best_encoder = ast_best_single_encoder, +}; + +static const struct drm_connector_funcs ast_connector_funcs = { + .dpms = drm_helper_connector_dpms, + .detect = ast_connector_detect, + .fill_modes = drm_helper_probe_single_connector_modes, + .destroy = ast_connector_destroy, +}; + +int ast_connector_init(struct drm_device *dev) +{ + struct ast_connector *ast_connector; + struct drm_connector *connector; + struct drm_encoder *encoder; + + ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL); + if (!ast_connector) + return -ENOMEM; + + connector = &ast_connector->base; + drm_connector_init(dev, connector, &ast_connector_funcs, DRM_MODE_CONNECTOR_VGA); + + drm_connector_helper_add(connector, &ast_connector_helper_funcs); + + connector->interlace_allowed = 0; + connector->doublescan_allowed = 0; + + drm_sysfs_connector_add(connector); + + connector->polled = DRM_CONNECTOR_POLL_CONNECT; + + encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head); + drm_mode_connector_attach_encoder(connector, encoder); + + ast_connector->i2c = ast_i2c_create(dev); + if (!ast_connector->i2c) + DRM_ERROR("failed to add ddc bus for connector\n"); + + return 0; +} + +/* allocate cursor cache and pin at start of VRAM */ +int ast_cursor_init(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + int size; + int ret; + struct drm_gem_object *obj; + struct ast_bo *bo; + uint64_t gpu_addr; + + size = (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE) * AST_DEFAULT_HWC_NUM; + + ret = ast_gem_create(dev, size, true, &obj); + if (ret) + return ret; + bo = gem_to_ast_bo(obj); + ret = ast_bo_reserve(bo, false); + if (unlikely(ret != 0)) + goto fail; + + ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); + ast_bo_unreserve(bo); + if (ret) + goto fail; + + /* kmap the object */ + ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &ast->cache_kmap); + if (ret) + goto fail; + + ast->cursor_cache = obj; + ast->cursor_cache_gpu_addr = gpu_addr; + DRM_DEBUG_KMS("pinned cursor cache at %llx\n", ast->cursor_cache_gpu_addr); + return 0; +fail: + return ret; +} + +void ast_cursor_fini(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + ttm_bo_kunmap(&ast->cache_kmap); + drm_gem_object_unreference_unlocked(ast->cursor_cache); +} + +int ast_mode_init(struct drm_device *dev) +{ + ast_cursor_init(dev); + ast_crtc_init(dev); + ast_encoder_init(dev); + ast_connector_init(dev); + return 0; +} + +void ast_mode_fini(struct drm_device *dev) +{ + ast_cursor_fini(dev); +} + +static int get_clock(void *i2c_priv) +{ + struct ast_i2c_chan *i2c = i2c_priv; + struct ast_private *ast = i2c->dev->dev_private; + uint32_t val; + + val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4; + return val & 1 ? 1 : 0; +} + +static int get_data(void *i2c_priv) +{ + struct ast_i2c_chan *i2c = i2c_priv; + struct ast_private *ast = i2c->dev->dev_private; + uint32_t val; + + val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5; + return val & 1 ? 1 : 0; +} + +static void set_clock(void *i2c_priv, int clock) +{ + struct ast_i2c_chan *i2c = i2c_priv; + struct ast_private *ast = i2c->dev->dev_private; + int i; + u8 ujcrb7, jtemp; + + for (i = 0; i < 0x10000; i++) { + ujcrb7 = ((clock & 0x01) ? 0 : 1); + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfe, ujcrb7); + jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01); + if (ujcrb7 == jtemp) + break; + } +} + +static void set_data(void *i2c_priv, int data) +{ + struct ast_i2c_chan *i2c = i2c_priv; + struct ast_private *ast = i2c->dev->dev_private; + int i; + u8 ujcrb7, jtemp; + + for (i = 0; i < 0x10000; i++) { + ujcrb7 = ((data & 0x01) ? 0 : 1) << 2; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfb, ujcrb7); + jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04); + if (ujcrb7 == jtemp) + break; + } +} + +static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev) +{ + struct ast_i2c_chan *i2c; + int ret; + + i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL); + if (!i2c) + return NULL; + + i2c->adapter.owner = THIS_MODULE; + i2c->adapter.class = I2C_CLASS_DDC; + i2c->adapter.dev.parent = &dev->pdev->dev; + i2c->dev = dev; + i2c_set_adapdata(&i2c->adapter, i2c); + snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), + "AST i2c bit bus"); + i2c->adapter.algo_data = &i2c->bit; + + i2c->bit.udelay = 20; + i2c->bit.timeout = 2; + i2c->bit.data = i2c; + i2c->bit.setsda = set_data; + i2c->bit.setscl = set_clock; + i2c->bit.getsda = get_data; + i2c->bit.getscl = get_clock; + ret = i2c_bit_add_bus(&i2c->adapter); + if (ret) { + DRM_ERROR("Failed to register bit i2c\n"); + goto out_free; + } + + return i2c; +out_free: + kfree(i2c); + return NULL; +} + +static void ast_i2c_destroy(struct ast_i2c_chan *i2c) +{ + if (!i2c) + return; + i2c_del_adapter(&i2c->adapter); + kfree(i2c); +} + +void ast_show_cursor(struct drm_crtc *crtc) +{ + struct ast_private *ast = crtc->dev->dev_private; + u8 jreg; + + jreg = 0x2; + /* enable ARGB cursor */ + jreg |= 1; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg); +} + +void ast_hide_cursor(struct drm_crtc *crtc) +{ + struct ast_private *ast = crtc->dev->dev_private; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00); +} + +static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height) +{ + union { + u32 ul; + u8 b[4]; + } srcdata32[2], data32; + union { + u16 us; + u8 b[2]; + } data16; + u32 csum = 0; + s32 alpha_dst_delta, last_alpha_dst_delta; + u8 *srcxor, *dstxor; + int i, j; + u32 per_pixel_copy, two_pixel_copy; + + alpha_dst_delta = AST_MAX_HWC_WIDTH << 1; + last_alpha_dst_delta = alpha_dst_delta - (width << 1); + + srcxor = src; + dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta; + per_pixel_copy = width & 1; + two_pixel_copy = width >> 1; + + for (j = 0; j < height; j++) { + for (i = 0; i < two_pixel_copy; i++) { + srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; + srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0; + data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); + data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); + data32.b[2] = srcdata32[0].b[1] | (srcdata32[1].b[0] >> 4); + data32.b[3] = srcdata32[0].b[3] | (srcdata32[1].b[2] >> 4); + + writel(data32.ul, dstxor); + csum += data32.ul; + + dstxor += 4; + srcxor += 8; + + } + + for (i = 0; i < per_pixel_copy; i++) { + srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; + data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); + data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); + writew(data16.us, dstxor); + csum += (u32)data16.us; + + dstxor += 2; + srcxor += 4; + } + dstxor += last_alpha_dst_delta; + } + return csum; +} + +static int ast_cursor_set(struct drm_crtc *crtc, + struct drm_file *file_priv, + uint32_t handle, + uint32_t width, + uint32_t height) +{ + struct ast_private *ast = crtc->dev->dev_private; + struct ast_crtc *ast_crtc = to_ast_crtc(crtc); + struct drm_gem_object *obj; + struct ast_bo *bo; + uint64_t gpu_addr; + u32 csum; + int ret; + struct ttm_bo_kmap_obj uobj_map; + u8 *src, *dst; + bool src_isiomem, dst_isiomem; + if (!handle) { + ast_hide_cursor(crtc); + return 0; + } + + if (width > AST_MAX_HWC_WIDTH || height > AST_MAX_HWC_HEIGHT) + return -EINVAL; + + obj = drm_gem_object_lookup(crtc->dev, file_priv, handle); + if (!obj) { + DRM_ERROR("Cannot find cursor object %x for crtc\n", handle); + return -ENOENT; + } + bo = gem_to_ast_bo(obj); + + ret = ast_bo_reserve(bo, false); + if (ret) + goto fail; + + ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &uobj_map); + + src = ttm_kmap_obj_virtual(&uobj_map, &src_isiomem); + dst = ttm_kmap_obj_virtual(&ast->cache_kmap, &dst_isiomem); + + if (src_isiomem == true) + DRM_ERROR("src cursor bo should be in main memory\n"); + if (dst_isiomem == false) + DRM_ERROR("dst bo should be in VRAM\n"); + + dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor; + + /* do data transfer to cursor cache */ + csum = copy_cursor_image(src, dst, width, height); + + /* write checksum + signature */ + ttm_bo_kunmap(&uobj_map); + ast_bo_unreserve(bo); + { + u8 *dst = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE; + writel(csum, dst); + writel(width, dst + AST_HWC_SIGNATURE_SizeX); + writel(height, dst + AST_HWC_SIGNATURE_SizeY); + writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX); + writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY); + + /* set pattern offset */ + gpu_addr = ast->cursor_cache_gpu_addr; + gpu_addr += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor; + gpu_addr >>= 3; + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr & 0xff); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr >> 8) & 0xff); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr >> 16) & 0xff); + } + ast_crtc->cursor_width = width; + ast_crtc->cursor_height = height; + ast_crtc->offset_x = AST_MAX_HWC_WIDTH - width; + ast_crtc->offset_y = AST_MAX_HWC_WIDTH - height; + + ast->next_cursor = (ast->next_cursor + 1) % AST_DEFAULT_HWC_NUM; + + ast_show_cursor(crtc); + + drm_gem_object_unreference_unlocked(obj); + return 0; +fail: + drm_gem_object_unreference_unlocked(obj); + return ret; +} + +static int ast_cursor_move(struct drm_crtc *crtc, + int x, int y) +{ + struct ast_crtc *ast_crtc = to_ast_crtc(crtc); + struct ast_private *ast = crtc->dev->dev_private; + int x_offset, y_offset; + u8 *sig; + + sig = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE; + writel(x, sig + AST_HWC_SIGNATURE_X); + writel(y, sig + AST_HWC_SIGNATURE_Y); + + x_offset = ast_crtc->offset_x; + y_offset = ast_crtc->offset_y; + if (x < 0) { + x_offset = (-x) + ast_crtc->offset_x; + x = 0; + } + + if (y < 0) { + y_offset = (-y) + ast_crtc->offset_y; + y = 0; + } + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff)); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f)); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff)); + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07)); + + /* dummy write to fire HWC */ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xCB, 0xFF, 0x00); + + return 0; +} diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c new file mode 100644 index 000000000000..977cfb35837a --- /dev/null +++ b/drivers/gpu/drm/ast/ast_post.c @@ -0,0 +1,1780 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ +/* + * Authors: Dave Airlie + */ + +#include +#include "ast_drv.h" + +#include "ast_dram_tables.h" + +static void ast_init_dram_2300(struct drm_device *dev); + +static void +ast_enable_vga(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + + ast_io_write8(ast, 0x43, 0x01); + ast_io_write8(ast, 0x42, 0x01); +} + +#if 0 /* will use later */ +static bool +ast_is_vga_enabled(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + u8 ch; + + if (ast->chip == AST1180) { + /* TODO 1180 */ + } else { + ch = ast_io_read8(ast, 0x43); + if (ch) { + ast_open_key(ast); + ch = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff); + return ch & 0x04; + } + } + return 0; +} +#endif + +static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff }; +static const u8 extreginfo_ast2300a0[] = { 0x0f, 0x04, 0x1c, 0xff }; +static const u8 extreginfo_ast2300[] = { 0x0f, 0x04, 0x1f, 0xff }; + +static void +ast_set_def_ext_reg(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + u8 i, index, reg; + const u8 *ext_reg_info; + + /* reset scratch */ + for (i = 0x81; i <= 0x8f; i++) + ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, 0x00); + + if (ast->chip == AST2300) { + if (dev->pdev->revision >= 0x20) + ext_reg_info = extreginfo_ast2300; + else + ext_reg_info = extreginfo_ast2300a0; + } else + ext_reg_info = extreginfo; + + index = 0xa0; + while (*ext_reg_info != 0xff) { + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, index, 0x00, *ext_reg_info); + index++; + ext_reg_info++; + } + + /* disable standard IO/MEM decode if secondary */ + /* ast_set_index_reg-mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x3); */ + + /* Set Ext. Default */ + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x8c, 0x00, 0x01); + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x00, 0x00); + + /* Enable RAMDAC for A1 */ + reg = 0x04; + if (ast->chip == AST2300) + reg |= 0x20; + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff, reg); +} + +static inline u32 mindwm(struct ast_private *ast, u32 r) +{ + ast_write32(ast, 0xf004, r & 0xffff0000); + ast_write32(ast, 0xf000, 0x1); + + return ast_read32(ast, 0x10000 + (r & 0x0000ffff)); +} + +static inline void moutdwm(struct ast_private *ast, u32 r, u32 v) +{ + ast_write32(ast, 0xf004, r & 0xffff0000); + ast_write32(ast, 0xf000, 0x1); + ast_write32(ast, 0x10000 + (r & 0x0000ffff), v); +} + +/* + * AST2100/2150 DLL CBR Setting + */ +#define CBR_SIZE_AST2150 ((16 << 10) - 1) +#define CBR_PASSNUM_AST2150 5 +#define CBR_THRESHOLD_AST2150 10 +#define CBR_THRESHOLD2_AST2150 10 +#define TIMEOUT_AST2150 5000000 + +#define CBR_PATNUM_AST2150 8 + +static const u32 pattern_AST2150[14] = { + 0xFF00FF00, + 0xCC33CC33, + 0xAA55AA55, + 0xFFFE0001, + 0x683501FE, + 0x0F1929B0, + 0x2D0B4346, + 0x60767F02, + 0x6FBE36A6, + 0x3A253035, + 0x3019686D, + 0x41C6167E, + 0x620152BF, + 0x20F050E0 +}; + +static u32 mmctestburst2_ast2150(struct ast_private *ast, u32 datagen) +{ + u32 data, timeout; + + moutdwm(ast, 0x1e6e0070, 0x00000000); + moutdwm(ast, 0x1e6e0070, 0x00000001 | (datagen << 3)); + timeout = 0; + do { + data = mindwm(ast, 0x1e6e0070) & 0x40; + if (++timeout > TIMEOUT_AST2150) { + moutdwm(ast, 0x1e6e0070, 0x00000000); + return 0xffffffff; + } + } while (!data); + moutdwm(ast, 0x1e6e0070, 0x00000000); + moutdwm(ast, 0x1e6e0070, 0x00000003 | (datagen << 3)); + timeout = 0; + do { + data = mindwm(ast, 0x1e6e0070) & 0x40; + if (++timeout > TIMEOUT_AST2150) { + moutdwm(ast, 0x1e6e0070, 0x00000000); + return 0xffffffff; + } + } while (!data); + data = (mindwm(ast, 0x1e6e0070) & 0x80) >> 7; + moutdwm(ast, 0x1e6e0070, 0x00000000); + return data; +} + +#if 0 /* unused in DDX driver - here for completeness */ +static u32 mmctestsingle2_ast2150(struct ast_private *ast, u32 datagen) +{ + u32 data, timeout; + + moutdwm(ast, 0x1e6e0070, 0x00000000); + moutdwm(ast, 0x1e6e0070, 0x00000005 | (datagen << 3)); + timeout = 0; + do { + data = mindwm(ast, 0x1e6e0070) & 0x40; + if (++timeout > TIMEOUT_AST2150) { + moutdwm(ast, 0x1e6e0070, 0x00000000); + return 0xffffffff; + } + } while (!data); + data = (mindwm(ast, 0x1e6e0070) & 0x80) >> 7; + moutdwm(ast, 0x1e6e0070, 0x00000000); + return data; +} +#endif + +static int cbrtest_ast2150(struct ast_private *ast) +{ + int i; + + for (i = 0; i < 8; i++) + if (mmctestburst2_ast2150(ast, i)) + return 0; + return 1; +} + +static int cbrscan_ast2150(struct ast_private *ast, int busw) +{ + u32 patcnt, loop; + + for (patcnt = 0; patcnt < CBR_PATNUM_AST2150; patcnt++) { + moutdwm(ast, 0x1e6e007c, pattern_AST2150[patcnt]); + for (loop = 0; loop < CBR_PASSNUM_AST2150; loop++) { + if (cbrtest_ast2150(ast)) + break; + } + if (loop == CBR_PASSNUM_AST2150) + return 0; + } + return 1; +} + + +static void cbrdlli_ast2150(struct ast_private *ast, int busw) +{ + u32 dll_min[4], dll_max[4], dlli, data, passcnt; + +cbr_start: + dll_min[0] = dll_min[1] = dll_min[2] = dll_min[3] = 0xff; + dll_max[0] = dll_max[1] = dll_max[2] = dll_max[3] = 0x0; + passcnt = 0; + + for (dlli = 0; dlli < 100; dlli++) { + moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24)); + data = cbrscan_ast2150(ast, busw); + if (data != 0) { + if (data & 0x1) { + if (dll_min[0] > dlli) + dll_min[0] = dlli; + if (dll_max[0] < dlli) + dll_max[0] = dlli; + } + passcnt++; + } else if (passcnt >= CBR_THRESHOLD_AST2150) + goto cbr_start; + } + if (dll_max[0] == 0 || (dll_max[0]-dll_min[0]) < CBR_THRESHOLD_AST2150) + goto cbr_start; + + dlli = dll_min[0] + (((dll_max[0] - dll_min[0]) * 7) >> 4); + moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24)); +} + + + +static void ast_init_dram_reg(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + u8 j; + u32 data, temp, i; + const struct ast_dramstruct *dram_reg_info; + + j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); + + if ((j & 0x80) == 0) { /* VGA only */ + if (ast->chip == AST2000) { + dram_reg_info = ast2000_dram_table_data; + ast_write32(ast, 0xf004, 0x1e6e0000); + ast_write32(ast, 0xf000, 0x1); + ast_write32(ast, 0x10100, 0xa8); + + do { + ; + } while (ast_read32(ast, 0x10100) != 0xa8); + } else {/* AST2100/1100 */ + if (ast->chip == AST2100 || ast->chip == 2200) + dram_reg_info = ast2100_dram_table_data; + else + dram_reg_info = ast1100_dram_table_data; + + ast_write32(ast, 0xf004, 0x1e6e0000); + ast_write32(ast, 0xf000, 0x1); + ast_write32(ast, 0x12000, 0x1688A8A8); + do { + ; + } while (ast_read32(ast, 0x12000) != 0x01); + + ast_write32(ast, 0x10000, 0xfc600309); + do { + ; + } while (ast_read32(ast, 0x10000) != 0x01); + } + + while (dram_reg_info->index != 0xffff) { + if (dram_reg_info->index == 0xff00) {/* delay fn */ + for (i = 0; i < 15; i++) + udelay(dram_reg_info->data); + } else if (dram_reg_info->index == 0x4 && ast->chip != AST2000) { + data = dram_reg_info->data; + if (ast->dram_type == AST_DRAM_1Gx16) + data = 0x00000d89; + else if (ast->dram_type == AST_DRAM_1Gx32) + data = 0x00000c8d; + + temp = ast_read32(ast, 0x12070); + temp &= 0xc; + temp <<= 2; + ast_write32(ast, 0x10000 + dram_reg_info->index, data | temp); + } else + ast_write32(ast, 0x10000 + dram_reg_info->index, dram_reg_info->data); + dram_reg_info++; + } + + /* AST 2100/2150 DRAM calibration */ + data = ast_read32(ast, 0x10120); + if (data == 0x5061) { /* 266Mhz */ + data = ast_read32(ast, 0x10004); + if (data & 0x40) + cbrdlli_ast2150(ast, 16); /* 16 bits */ + else + cbrdlli_ast2150(ast, 32); /* 32 bits */ + } + + switch (ast->chip) { + case AST2000: + temp = ast_read32(ast, 0x10140); + ast_write32(ast, 0x10140, temp | 0x40); + break; + case AST1100: + case AST2100: + case AST2200: + case AST2150: + temp = ast_read32(ast, 0x1200c); + ast_write32(ast, 0x1200c, temp & 0xfffffffd); + temp = ast_read32(ast, 0x12040); + ast_write32(ast, 0x12040, temp | 0x40); + break; + default: + break; + } + } + + /* wait ready */ + do { + j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); + } while ((j & 0x40) == 0); +} + +void ast_post_gpu(struct drm_device *dev) +{ + u32 reg; + struct ast_private *ast = dev->dev_private; + + pci_read_config_dword(ast->dev->pdev, 0x04, ®); + reg |= 0x3; + pci_write_config_dword(ast->dev->pdev, 0x04, reg); + + ast_enable_vga(dev); + ast_open_key(ast); + ast_set_def_ext_reg(dev); + + if (ast->chip == AST2300) + ast_init_dram_2300(dev); + else + ast_init_dram_reg(dev); +} + +/* AST 2300 DRAM settings */ +#define AST_DDR3 0 +#define AST_DDR2 1 + +struct ast2300_dram_param { + u32 dram_type; + u32 dram_chipid; + u32 dram_freq; + u32 vram_size; + u32 odt; + u32 wodt; + u32 rodt; + u32 dram_config; + u32 reg_PERIOD; + u32 reg_MADJ; + u32 reg_SADJ; + u32 reg_MRS; + u32 reg_EMRS; + u32 reg_AC1; + u32 reg_AC2; + u32 reg_DQSIC; + u32 reg_DRV; + u32 reg_IOZ; + u32 reg_DQIDLY; + u32 reg_FREQ; + u32 madj_max; + u32 dll2_finetune_step; +}; + +/* + * DQSI DLL CBR Setting + */ +#define CBR_SIZE1 ((4 << 10) - 1) +#define CBR_SIZE2 ((64 << 10) - 1) +#define CBR_PASSNUM 5 +#define CBR_PASSNUM2 5 +#define CBR_THRESHOLD 10 +#define CBR_THRESHOLD2 10 +#define TIMEOUT 5000000 +#define CBR_PATNUM 8 + +static const u32 pattern[8] = { + 0xFF00FF00, + 0xCC33CC33, + 0xAA55AA55, + 0x88778877, + 0x92CC4D6E, + 0x543D3CDE, + 0xF1E843C7, + 0x7C61D253 +}; + +#if 0 /* unused in DDX, included for completeness */ +static int mmc_test_burst(struct ast_private *ast, u32 datagen) +{ + u32 data, timeout; + + moutdwm(ast, 0x1e6e0070, 0x00000000); + moutdwm(ast, 0x1e6e0070, 0x000000c1 | (datagen << 3)); + timeout = 0; + do { + data = mindwm(ast, 0x1e6e0070) & 0x3000; + if (data & 0x2000) { + return 0; + } + if (++timeout > TIMEOUT) { + moutdwm(ast, 0x1e6e0070, 0x00000000); + return 0; + } + } while (!data); + moutdwm(ast, 0x1e6e0070, 0x00000000); + return 1; +} +#endif + +static int mmc_test_burst2(struct ast_private *ast, u32 datagen) +{ + u32 data, timeout; + + moutdwm(ast, 0x1e6e0070, 0x00000000); + moutdwm(ast, 0x1e6e0070, 0x00000041 | (datagen << 3)); + timeout = 0; + do { + data = mindwm(ast, 0x1e6e0070) & 0x1000; + if (++timeout > TIMEOUT) { + moutdwm(ast, 0x1e6e0070, 0x0); + return -1; + } + } while (!data); + data = mindwm(ast, 0x1e6e0078); + data = (data | (data >> 16)) & 0xffff; + moutdwm(ast, 0x1e6e0070, 0x0); + return data; +} + +#if 0 /* Unused in DDX here for completeness */ +static int mmc_test_single(struct ast_private *ast, u32 datagen) +{ + u32 data, timeout; + + moutdwm(ast, 0x1e6e0070, 0x00000000); + moutdwm(ast, 0x1e6e0070, 0x000000c5 | (datagen << 3)); + timeout = 0; + do { + data = mindwm(ast, 0x1e6e0070) & 0x3000; + if (data & 0x2000) + return 0; + if (++timeout > TIMEOUT) { + moutdwm(ast, 0x1e6e0070, 0x0); + return 0; + } + } while (!data); + moutdwm(ast, 0x1e6e0070, 0x0); + return 1; +} +#endif + +static int mmc_test_single2(struct ast_private *ast, u32 datagen) +{ + u32 data, timeout; + + moutdwm(ast, 0x1e6e0070, 0x00000000); + moutdwm(ast, 0x1e6e0070, 0x00000005 | (datagen << 3)); + timeout = 0; + do { + data = mindwm(ast, 0x1e6e0070) & 0x1000; + if (++timeout > TIMEOUT) { + moutdwm(ast, 0x1e6e0070, 0x0); + return -1; + } + } while (!data); + data = mindwm(ast, 0x1e6e0078); + data = (data | (data >> 16)) & 0xffff; + moutdwm(ast, 0x1e6e0070, 0x0); + return data; +} + +static int cbr_test(struct ast_private *ast) +{ + u32 data; + int i; + data = mmc_test_single2(ast, 0); + if ((data & 0xff) && (data & 0xff00)) + return 0; + for (i = 0; i < 8; i++) { + data = mmc_test_burst2(ast, i); + if ((data & 0xff) && (data & 0xff00)) + return 0; + } + if (!data) + return 3; + else if (data & 0xff) + return 2; + return 1; +} + +static int cbr_scan(struct ast_private *ast) +{ + u32 data, data2, patcnt, loop; + + data2 = 3; + for (patcnt = 0; patcnt < CBR_PATNUM; patcnt++) { + moutdwm(ast, 0x1e6e007c, pattern[patcnt]); + for (loop = 0; loop < CBR_PASSNUM2; loop++) { + if ((data = cbr_test(ast)) != 0) { + data2 &= data; + if (!data2) + return 0; + break; + } + } + if (loop == CBR_PASSNUM2) + return 0; + } + return data2; +} + +static u32 cbr_test2(struct ast_private *ast) +{ + u32 data; + + data = mmc_test_burst2(ast, 0); + if (data == 0xffff) + return 0; + data |= mmc_test_single2(ast, 0); + if (data == 0xffff) + return 0; + + return ~data & 0xffff; +} + +static u32 cbr_scan2(struct ast_private *ast) +{ + u32 data, data2, patcnt, loop; + + data2 = 0xffff; + for (patcnt = 0; patcnt < CBR_PATNUM; patcnt++) { + moutdwm(ast, 0x1e6e007c, pattern[patcnt]); + for (loop = 0; loop < CBR_PASSNUM2; loop++) { + if ((data = cbr_test2(ast)) != 0) { + data2 &= data; + if (!data) + return 0; + break; + } + } + if (loop == CBR_PASSNUM2) + return 0; + } + return data2; +} + +#if 0 /* unused in DDX - added for completeness */ +static void finetuneDQI(struct ast_private *ast, struct ast2300_dram_param *param) +{ + u32 gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt; + + gold_sadj[0] = (mindwm(ast, 0x1E6E0024) >> 16) & 0xffff; + gold_sadj[1] = gold_sadj[0] >> 8; + gold_sadj[0] = gold_sadj[0] & 0xff; + gold_sadj[0] = (gold_sadj[0] + gold_sadj[1]) >> 1; + gold_sadj[1] = gold_sadj[0]; + + for (cnt = 0; cnt < 16; cnt++) { + dllmin[cnt] = 0xff; + dllmax[cnt] = 0x0; + } + passcnt = 0; + for (dlli = 0; dlli < 76; dlli++) { + moutdwm(ast, 0x1E6E0068, 0x00001400 | (dlli << 16) | (dlli << 24)); + /* Wait DQSI latch phase calibration */ + moutdwm(ast, 0x1E6E0074, 0x00000010); + moutdwm(ast, 0x1E6E0070, 0x00000003); + do { + data = mindwm(ast, 0x1E6E0070); + } while (!(data & 0x00001000)); + moutdwm(ast, 0x1E6E0070, 0x00000000); + + moutdwm(ast, 0x1E6E0074, CBR_SIZE1); + data = cbr_scan2(ast); + if (data != 0) { + mask = 0x00010001; + for (cnt = 0; cnt < 16; cnt++) { + if (data & mask) { + if (dllmin[cnt] > dlli) { + dllmin[cnt] = dlli; + } + if (dllmax[cnt] < dlli) { + dllmax[cnt] = dlli; + } + } + mask <<= 1; + } + passcnt++; + } else if (passcnt >= CBR_THRESHOLD) { + break; + } + } + data = 0; + for (cnt = 0; cnt < 8; cnt++) { + data >>= 3; + if ((dllmax[cnt] > dllmin[cnt]) && ((dllmax[cnt] - dllmin[cnt]) >= CBR_THRESHOLD)) { + dlli = (dllmin[cnt] + dllmax[cnt]) >> 1; + if (gold_sadj[0] >= dlli) { + dlli = (gold_sadj[0] - dlli) >> 1; + if (dlli > 3) { + dlli = 3; + } + } else { + dlli = (dlli - gold_sadj[0]) >> 1; + if (dlli > 4) { + dlli = 4; + } + dlli = (8 - dlli) & 0x7; + } + data |= dlli << 21; + } + } + moutdwm(ast, 0x1E6E0080, data); + + data = 0; + for (cnt = 8; cnt < 16; cnt++) { + data >>= 3; + if ((dllmax[cnt] > dllmin[cnt]) && ((dllmax[cnt] - dllmin[cnt]) >= CBR_THRESHOLD)) { + dlli = (dllmin[cnt] + dllmax[cnt]) >> 1; + if (gold_sadj[1] >= dlli) { + dlli = (gold_sadj[1] - dlli) >> 1; + if (dlli > 3) { + dlli = 3; + } else { + dlli = (dlli - 1) & 0x7; + } + } else { + dlli = (dlli - gold_sadj[1]) >> 1; + dlli += 1; + if (dlli > 4) { + dlli = 4; + } + dlli = (8 - dlli) & 0x7; + } + data |= dlli << 21; + } + } + moutdwm(ast, 0x1E6E0084, data); + +} /* finetuneDQI */ +#endif + +static void finetuneDQI_L(struct ast_private *ast, struct ast2300_dram_param *param) +{ + u32 gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt; + +FINETUNE_START: + for (cnt = 0; cnt < 16; cnt++) { + dllmin[cnt] = 0xff; + dllmax[cnt] = 0x0; + } + passcnt = 0; + for (dlli = 0; dlli < 76; dlli++) { + moutdwm(ast, 0x1E6E0068, 0x00001400 | (dlli << 16) | (dlli << 24)); + /* Wait DQSI latch phase calibration */ + moutdwm(ast, 0x1E6E0074, 0x00000010); + moutdwm(ast, 0x1E6E0070, 0x00000003); + do { + data = mindwm(ast, 0x1E6E0070); + } while (!(data & 0x00001000)); + moutdwm(ast, 0x1E6E0070, 0x00000000); + + moutdwm(ast, 0x1E6E0074, CBR_SIZE1); + data = cbr_scan2(ast); + if (data != 0) { + mask = 0x00010001; + for (cnt = 0; cnt < 16; cnt++) { + if (data & mask) { + if (dllmin[cnt] > dlli) { + dllmin[cnt] = dlli; + } + if (dllmax[cnt] < dlli) { + dllmax[cnt] = dlli; + } + } + mask <<= 1; + } + passcnt++; + } else if (passcnt >= CBR_THRESHOLD2) { + break; + } + } + gold_sadj[0] = 0x0; + passcnt = 0; + for (cnt = 0; cnt < 16; cnt++) { + if ((dllmax[cnt] > dllmin[cnt]) && ((dllmax[cnt] - dllmin[cnt]) >= CBR_THRESHOLD2)) { + gold_sadj[0] += dllmin[cnt]; + passcnt++; + } + } + if (passcnt != 16) { + goto FINETUNE_START; + } + gold_sadj[0] = gold_sadj[0] >> 4; + gold_sadj[1] = gold_sadj[0]; + + data = 0; + for (cnt = 0; cnt < 8; cnt++) { + data >>= 3; + if ((dllmax[cnt] > dllmin[cnt]) && ((dllmax[cnt] - dllmin[cnt]) >= CBR_THRESHOLD2)) { + dlli = dllmin[cnt]; + if (gold_sadj[0] >= dlli) { + dlli = ((gold_sadj[0] - dlli) * 19) >> 5; + if (dlli > 3) { + dlli = 3; + } + } else { + dlli = ((dlli - gold_sadj[0]) * 19) >> 5; + if (dlli > 4) { + dlli = 4; + } + dlli = (8 - dlli) & 0x7; + } + data |= dlli << 21; + } + } + moutdwm(ast, 0x1E6E0080, data); + + data = 0; + for (cnt = 8; cnt < 16; cnt++) { + data >>= 3; + if ((dllmax[cnt] > dllmin[cnt]) && ((dllmax[cnt] - dllmin[cnt]) >= CBR_THRESHOLD2)) { + dlli = dllmin[cnt]; + if (gold_sadj[1] >= dlli) { + dlli = ((gold_sadj[1] - dlli) * 19) >> 5; + if (dlli > 3) { + dlli = 3; + } else { + dlli = (dlli - 1) & 0x7; + } + } else { + dlli = ((dlli - gold_sadj[1]) * 19) >> 5; + dlli += 1; + if (dlli > 4) { + dlli = 4; + } + dlli = (8 - dlli) & 0x7; + } + data |= dlli << 21; + } + } + moutdwm(ast, 0x1E6E0084, data); + +} /* finetuneDQI_L */ + +static void finetuneDQI_L2(struct ast_private *ast, struct ast2300_dram_param *param) +{ + u32 gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt, data2; + + for (cnt = 0; cnt < 16; cnt++) { + dllmin[cnt] = 0xff; + dllmax[cnt] = 0x0; + } + passcnt = 0; + for (dlli = 0; dlli < 76; dlli++) { + moutdwm(ast, 0x1E6E0068, 0x00001400 | (dlli << 16) | (dlli << 24)); + /* Wait DQSI latch phase calibration */ + moutdwm(ast, 0x1E6E0074, 0x00000010); + moutdwm(ast, 0x1E6E0070, 0x00000003); + do { + data = mindwm(ast, 0x1E6E0070); + } while (!(data & 0x00001000)); + moutdwm(ast, 0x1E6E0070, 0x00000000); + + moutdwm(ast, 0x1E6E0074, CBR_SIZE2); + data = cbr_scan2(ast); + if (data != 0) { + mask = 0x00010001; + for (cnt = 0; cnt < 16; cnt++) { + if (data & mask) { + if (dllmin[cnt] > dlli) { + dllmin[cnt] = dlli; + } + if (dllmax[cnt] < dlli) { + dllmax[cnt] = dlli; + } + } + mask <<= 1; + } + passcnt++; + } else if (passcnt >= CBR_THRESHOLD2) { + break; + } + } + gold_sadj[0] = 0x0; + gold_sadj[1] = 0xFF; + for (cnt = 0; cnt < 8; cnt++) { + if ((dllmax[cnt] > dllmin[cnt]) && ((dllmax[cnt] - dllmin[cnt]) >= CBR_THRESHOLD2)) { + if (gold_sadj[0] < dllmin[cnt]) { + gold_sadj[0] = dllmin[cnt]; + } + if (gold_sadj[1] > dllmax[cnt]) { + gold_sadj[1] = dllmax[cnt]; + } + } + } + gold_sadj[0] = (gold_sadj[1] + gold_sadj[0]) >> 1; + gold_sadj[1] = mindwm(ast, 0x1E6E0080); + + data = 0; + for (cnt = 0; cnt < 8; cnt++) { + data >>= 3; + data2 = gold_sadj[1] & 0x7; + gold_sadj[1] >>= 3; + if ((dllmax[cnt] > dllmin[cnt]) && ((dllmax[cnt] - dllmin[cnt]) >= CBR_THRESHOLD2)) { + dlli = (dllmin[cnt] + dllmax[cnt]) >> 1; + if (gold_sadj[0] >= dlli) { + dlli = (gold_sadj[0] - dlli) >> 1; + if (dlli > 0) { + dlli = 1; + } + if (data2 != 3) { + data2 = (data2 + dlli) & 0x7; + } + } else { + dlli = (dlli - gold_sadj[0]) >> 1; + if (dlli > 0) { + dlli = 1; + } + if (data2 != 4) { + data2 = (data2 - dlli) & 0x7; + } + } + } + data |= data2 << 21; + } + moutdwm(ast, 0x1E6E0080, data); + + gold_sadj[0] = 0x0; + gold_sadj[1] = 0xFF; + for (cnt = 8; cnt < 16; cnt++) { + if ((dllmax[cnt] > dllmin[cnt]) && ((dllmax[cnt] - dllmin[cnt]) >= CBR_THRESHOLD2)) { + if (gold_sadj[0] < dllmin[cnt]) { + gold_sadj[0] = dllmin[cnt]; + } + if (gold_sadj[1] > dllmax[cnt]) { + gold_sadj[1] = dllmax[cnt]; + } + } + } + gold_sadj[0] = (gold_sadj[1] + gold_sadj[0]) >> 1; + gold_sadj[1] = mindwm(ast, 0x1E6E0084); + + data = 0; + for (cnt = 8; cnt < 16; cnt++) { + data >>= 3; + data2 = gold_sadj[1] & 0x7; + gold_sadj[1] >>= 3; + if ((dllmax[cnt] > dllmin[cnt]) && ((dllmax[cnt] - dllmin[cnt]) >= CBR_THRESHOLD2)) { + dlli = (dllmin[cnt] + dllmax[cnt]) >> 1; + if (gold_sadj[0] >= dlli) { + dlli = (gold_sadj[0] - dlli) >> 1; + if (dlli > 0) { + dlli = 1; + } + if (data2 != 3) { + data2 = (data2 + dlli) & 0x7; + } + } else { + dlli = (dlli - gold_sadj[0]) >> 1; + if (dlli > 0) { + dlli = 1; + } + if (data2 != 4) { + data2 = (data2 - dlli) & 0x7; + } + } + } + data |= data2 << 21; + } + moutdwm(ast, 0x1E6E0084, data); + +} /* finetuneDQI_L2 */ + +static void cbr_dll2(struct ast_private *ast, struct ast2300_dram_param *param) +{ + u32 dllmin[2], dllmax[2], dlli, data, data2, passcnt; + + + finetuneDQI_L(ast, param); + finetuneDQI_L2(ast, param); + +CBR_START2: + dllmin[0] = dllmin[1] = 0xff; + dllmax[0] = dllmax[1] = 0x0; + passcnt = 0; + for (dlli = 0; dlli < 76; dlli++) { + moutdwm(ast, 0x1E6E0068, 0x00001300 | (dlli << 16) | (dlli << 24)); + /* Wait DQSI latch phase calibration */ + moutdwm(ast, 0x1E6E0074, 0x00000010); + moutdwm(ast, 0x1E6E0070, 0x00000003); + do { + data = mindwm(ast, 0x1E6E0070); + } while (!(data & 0x00001000)); + moutdwm(ast, 0x1E6E0070, 0x00000000); + + moutdwm(ast, 0x1E6E0074, CBR_SIZE2); + data = cbr_scan(ast); + if (data != 0) { + if (data & 0x1) { + if (dllmin[0] > dlli) { + dllmin[0] = dlli; + } + if (dllmax[0] < dlli) { + dllmax[0] = dlli; + } + } + if (data & 0x2) { + if (dllmin[1] > dlli) { + dllmin[1] = dlli; + } + if (dllmax[1] < dlli) { + dllmax[1] = dlli; + } + } + passcnt++; + } else if (passcnt >= CBR_THRESHOLD) { + break; + } + } + if (dllmax[0] == 0 || (dllmax[0]-dllmin[0]) < CBR_THRESHOLD) { + goto CBR_START2; + } + if (dllmax[1] == 0 || (dllmax[1]-dllmin[1]) < CBR_THRESHOLD) { + goto CBR_START2; + } + dlli = (dllmin[1] + dllmax[1]) >> 1; + dlli <<= 8; + dlli += (dllmin[0] + dllmax[0]) >> 1; + moutdwm(ast, 0x1E6E0068, (mindwm(ast, 0x1E6E0068) & 0xFFFF) | (dlli << 16)); + + data = (mindwm(ast, 0x1E6E0080) >> 24) & 0x1F; + data2 = (mindwm(ast, 0x1E6E0018) & 0xff80ffff) | (data << 16); + moutdwm(ast, 0x1E6E0018, data2); + moutdwm(ast, 0x1E6E0024, 0x8001 | (data << 1) | (param->dll2_finetune_step << 8)); + + /* Wait DQSI latch phase calibration */ + moutdwm(ast, 0x1E6E0074, 0x00000010); + moutdwm(ast, 0x1E6E0070, 0x00000003); + do { + data = mindwm(ast, 0x1E6E0070); + } while (!(data & 0x00001000)); + moutdwm(ast, 0x1E6E0070, 0x00000000); + moutdwm(ast, 0x1E6E0070, 0x00000003); + do { + data = mindwm(ast, 0x1E6E0070); + } while (!(data & 0x00001000)); + moutdwm(ast, 0x1E6E0070, 0x00000000); +} /* CBRDLL2 */ + +static void get_ddr3_info(struct ast_private *ast, struct ast2300_dram_param *param) +{ + u32 trap, trap_AC2, trap_MRS; + + moutdwm(ast, 0x1E6E2000, 0x1688A8A8); + + /* Ger trap info */ + trap = (mindwm(ast, 0x1E6E2070) >> 25) & 0x3; + trap_AC2 = 0x00020000 + (trap << 16); + trap_AC2 |= 0x00300000 + ((trap & 0x2) << 19); + trap_MRS = 0x00000010 + (trap << 4); + trap_MRS |= ((trap & 0x2) << 18); + + param->reg_MADJ = 0x00034C4C; + param->reg_SADJ = 0x00001800; + param->reg_DRV = 0x000000F0; + param->reg_PERIOD = param->dram_freq; + param->rodt = 0; + + switch (param->dram_freq) { + case 336: + moutdwm(ast, 0x1E6E2020, 0x0190); + param->wodt = 0; + param->reg_AC1 = 0x22202725; + param->reg_AC2 = 0xAA007613 | trap_AC2; + param->reg_DQSIC = 0x000000BA; + param->reg_MRS = 0x04001400 | trap_MRS; + param->reg_EMRS = 0x00000000; + param->reg_IOZ = 0x00000034; + param->reg_DQIDLY = 0x00000074; + param->reg_FREQ = 0x00004DC0; + param->madj_max = 96; + param->dll2_finetune_step = 3; + break; + default: + case 396: + moutdwm(ast, 0x1E6E2020, 0x03F1); + param->wodt = 1; + param->reg_AC1 = 0x33302825; + param->reg_AC2 = 0xCC009617 | trap_AC2; + param->reg_DQSIC = 0x000000E2; + param->reg_MRS = 0x04001600 | trap_MRS; + param->reg_EMRS = 0x00000000; + param->reg_IOZ = 0x00000034; + param->reg_DRV = 0x000000FA; + param->reg_DQIDLY = 0x00000089; + param->reg_FREQ = 0x000050C0; + param->madj_max = 96; + param->dll2_finetune_step = 4; + + switch (param->dram_chipid) { + default: + case AST_DRAM_512Mx16: + case AST_DRAM_1Gx16: + param->reg_AC2 = 0xCC009617 | trap_AC2; + break; + case AST_DRAM_2Gx16: + param->reg_AC2 = 0xCC009622 | trap_AC2; + break; + case AST_DRAM_4Gx16: + param->reg_AC2 = 0xCC00963F | trap_AC2; + break; + } + break; + + case 408: + moutdwm(ast, 0x1E6E2020, 0x01F0); + param->wodt = 1; + param->reg_AC1 = 0x33302825; + param->reg_AC2 = 0xCC009617 | trap_AC2; + param->reg_DQSIC = 0x000000E2; + param->reg_MRS = 0x04001600 | trap_MRS; + param->reg_EMRS = 0x00000000; + param->reg_IOZ = 0x00000034; + param->reg_DRV = 0x000000FA; + param->reg_DQIDLY = 0x00000089; + param->reg_FREQ = 0x000050C0; + param->madj_max = 96; + param->dll2_finetune_step = 4; + + switch (param->dram_chipid) { + default: + case AST_DRAM_512Mx16: + case AST_DRAM_1Gx16: + param->reg_AC2 = 0xCC009617 | trap_AC2; + break; + case AST_DRAM_2Gx16: + param->reg_AC2 = 0xCC009622 | trap_AC2; + break; + case AST_DRAM_4Gx16: + param->reg_AC2 = 0xCC00963F | trap_AC2; + break; + } + + break; + case 456: + moutdwm(ast, 0x1E6E2020, 0x0230); + param->wodt = 0; + param->reg_AC1 = 0x33302926; + param->reg_AC2 = 0xCD44961A; + param->reg_DQSIC = 0x000000FC; + param->reg_MRS = 0x00081830; + param->reg_EMRS = 0x00000000; + param->reg_IOZ = 0x00000045; + param->reg_DQIDLY = 0x00000097; + param->reg_FREQ = 0x000052C0; + param->madj_max = 88; + param->dll2_finetune_step = 4; + break; + case 504: + moutdwm(ast, 0x1E6E2020, 0x0270); + param->wodt = 1; + param->reg_AC1 = 0x33302926; + param->reg_AC2 = 0xDE44A61D; + param->reg_DQSIC = 0x00000117; + param->reg_MRS = 0x00081A30; + param->reg_EMRS = 0x00000000; + param->reg_IOZ = 0x070000BB; + param->reg_DQIDLY = 0x000000A0; + param->reg_FREQ = 0x000054C0; + param->madj_max = 79; + param->dll2_finetune_step = 4; + break; + case 528: + moutdwm(ast, 0x1E6E2020, 0x0290); + param->wodt = 1; + param->rodt = 1; + param->reg_AC1 = 0x33302926; + param->reg_AC2 = 0xEF44B61E; + param->reg_DQSIC = 0x00000125; + param->reg_MRS = 0x00081A30; + param->reg_EMRS = 0x00000040; + param->reg_DRV = 0x000000F5; + param->reg_IOZ = 0x00000023; + param->reg_DQIDLY = 0x00000088; + param->reg_FREQ = 0x000055C0; + param->madj_max = 76; + param->dll2_finetune_step = 3; + break; + case 576: + moutdwm(ast, 0x1E6E2020, 0x0140); + param->reg_MADJ = 0x00136868; + param->reg_SADJ = 0x00004534; + param->wodt = 1; + param->rodt = 1; + param->reg_AC1 = 0x33302A37; + param->reg_AC2 = 0xEF56B61E; + param->reg_DQSIC = 0x0000013F; + param->reg_MRS = 0x00101A50; + param->reg_EMRS = 0x00000040; + param->reg_DRV = 0x000000FA; + param->reg_IOZ = 0x00000023; + param->reg_DQIDLY = 0x00000078; + param->reg_FREQ = 0x000057C0; + param->madj_max = 136; + param->dll2_finetune_step = 3; + break; + case 600: + moutdwm(ast, 0x1E6E2020, 0x02E1); + param->reg_MADJ = 0x00136868; + param->reg_SADJ = 0x00004534; + param->wodt = 1; + param->rodt = 1; + param->reg_AC1 = 0x32302A37; + param->reg_AC2 = 0xDF56B61F; + param->reg_DQSIC = 0x0000014D; + param->reg_MRS = 0x00101A50; + param->reg_EMRS = 0x00000004; + param->reg_DRV = 0x000000F5; + param->reg_IOZ = 0x00000023; + param->reg_DQIDLY = 0x00000078; + param->reg_FREQ = 0x000058C0; + param->madj_max = 132; + param->dll2_finetune_step = 3; + break; + case 624: + moutdwm(ast, 0x1E6E2020, 0x0160); + param->reg_MADJ = 0x00136868; + param->reg_SADJ = 0x00004534; + param->wodt = 1; + param->rodt = 1; + param->reg_AC1 = 0x32302A37; + param->reg_AC2 = 0xEF56B621; + param->reg_DQSIC = 0x0000015A; + param->reg_MRS = 0x02101A50; + param->reg_EMRS = 0x00000004; + param->reg_DRV = 0x000000F5; + param->reg_IOZ = 0x00000034; + param->reg_DQIDLY = 0x00000078; + param->reg_FREQ = 0x000059C0; + param->madj_max = 128; + param->dll2_finetune_step = 3; + break; + } /* switch freq */ + + switch (param->dram_chipid) { + case AST_DRAM_512Mx16: + param->dram_config = 0x130; + break; + default: + case AST_DRAM_1Gx16: + param->dram_config = 0x131; + break; + case AST_DRAM_2Gx16: + param->dram_config = 0x132; + break; + case AST_DRAM_4Gx16: + param->dram_config = 0x133; + break; + }; /* switch size */ + + switch (param->vram_size) { + default: + case AST_VIDMEM_SIZE_8M: + param->dram_config |= 0x00; + break; + case AST_VIDMEM_SIZE_16M: + param->dram_config |= 0x04; + break; + case AST_VIDMEM_SIZE_32M: + param->dram_config |= 0x08; + break; + case AST_VIDMEM_SIZE_64M: + param->dram_config |= 0x0c; + break; + } + +} + +static void ddr3_init(struct ast_private *ast, struct ast2300_dram_param *param) +{ + u32 data, data2; + + moutdwm(ast, 0x1E6E0000, 0xFC600309); + moutdwm(ast, 0x1E6E0018, 0x00000100); + moutdwm(ast, 0x1E6E0024, 0x00000000); + moutdwm(ast, 0x1E6E0034, 0x00000000); + udelay(10); + moutdwm(ast, 0x1E6E0064, param->reg_MADJ); + moutdwm(ast, 0x1E6E0068, param->reg_SADJ); + udelay(10); + moutdwm(ast, 0x1E6E0064, param->reg_MADJ | 0xC0000); + udelay(10); + + moutdwm(ast, 0x1E6E0004, param->dram_config); + moutdwm(ast, 0x1E6E0008, 0x90040f); + moutdwm(ast, 0x1E6E0010, param->reg_AC1); + moutdwm(ast, 0x1E6E0014, param->reg_AC2); + moutdwm(ast, 0x1E6E0020, param->reg_DQSIC); + moutdwm(ast, 0x1E6E0080, 0x00000000); + moutdwm(ast, 0x1E6E0084, 0x00000000); + moutdwm(ast, 0x1E6E0088, param->reg_DQIDLY); + moutdwm(ast, 0x1E6E0018, 0x4040A170); + moutdwm(ast, 0x1E6E0018, 0x20402370); + moutdwm(ast, 0x1E6E0038, 0x00000000); + moutdwm(ast, 0x1E6E0040, 0xFF444444); + moutdwm(ast, 0x1E6E0044, 0x22222222); + moutdwm(ast, 0x1E6E0048, 0x22222222); + moutdwm(ast, 0x1E6E004C, 0x00000002); + moutdwm(ast, 0x1E6E0050, 0x80000000); + moutdwm(ast, 0x1E6E0050, 0x00000000); + moutdwm(ast, 0x1E6E0054, 0); + moutdwm(ast, 0x1E6E0060, param->reg_DRV); + moutdwm(ast, 0x1E6E006C, param->reg_IOZ); + moutdwm(ast, 0x1E6E0070, 0x00000000); + moutdwm(ast, 0x1E6E0074, 0x00000000); + moutdwm(ast, 0x1E6E0078, 0x00000000); + moutdwm(ast, 0x1E6E007C, 0x00000000); + /* Wait MCLK2X lock to MCLK */ + do { + data = mindwm(ast, 0x1E6E001C); + } while (!(data & 0x08000000)); + moutdwm(ast, 0x1E6E0034, 0x00000001); + moutdwm(ast, 0x1E6E000C, 0x00005C04); + udelay(10); + moutdwm(ast, 0x1E6E000C, 0x00000000); + moutdwm(ast, 0x1E6E0034, 0x00000000); + data = mindwm(ast, 0x1E6E001C); + data = (data >> 8) & 0xff; + while ((data & 0x08) || ((data & 0x7) < 2) || (data < 4)) { + data2 = (mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; + if ((data2 & 0xff) > param->madj_max) { + break; + } + moutdwm(ast, 0x1E6E0064, data2); + if (data2 & 0x00100000) { + data2 = ((data2 & 0xff) >> 3) + 3; + } else { + data2 = ((data2 & 0xff) >> 2) + 5; + } + data = mindwm(ast, 0x1E6E0068) & 0xffff00ff; + data2 += data & 0xff; + data = data | (data2 << 8); + moutdwm(ast, 0x1E6E0068, data); + udelay(10); + moutdwm(ast, 0x1E6E0064, mindwm(ast, 0x1E6E0064) | 0xC0000); + udelay(10); + data = mindwm(ast, 0x1E6E0018) & 0xfffff1ff; + moutdwm(ast, 0x1E6E0018, data); + data = data | 0x200; + moutdwm(ast, 0x1E6E0018, data); + do { + data = mindwm(ast, 0x1E6E001C); + } while (!(data & 0x08000000)); + + moutdwm(ast, 0x1E6E0034, 0x00000001); + moutdwm(ast, 0x1E6E000C, 0x00005C04); + udelay(10); + moutdwm(ast, 0x1E6E000C, 0x00000000); + moutdwm(ast, 0x1E6E0034, 0x00000000); + data = mindwm(ast, 0x1E6E001C); + data = (data >> 8) & 0xff; + } + data = mindwm(ast, 0x1E6E0018) | 0xC00; + moutdwm(ast, 0x1E6E0018, data); + + moutdwm(ast, 0x1E6E0034, 0x00000001); + moutdwm(ast, 0x1E6E000C, 0x00000040); + udelay(50); + /* Mode Register Setting */ + moutdwm(ast, 0x1E6E002C, param->reg_MRS | 0x100); + moutdwm(ast, 0x1E6E0030, param->reg_EMRS); + moutdwm(ast, 0x1E6E0028, 0x00000005); + moutdwm(ast, 0x1E6E0028, 0x00000007); + moutdwm(ast, 0x1E6E0028, 0x00000003); + moutdwm(ast, 0x1E6E0028, 0x00000001); + moutdwm(ast, 0x1E6E002C, param->reg_MRS); + moutdwm(ast, 0x1E6E000C, 0x00005C08); + moutdwm(ast, 0x1E6E0028, 0x00000001); + + moutdwm(ast, 0x1E6E000C, 0x7FFF5C01); + data = 0; + if (param->wodt) { + data = 0x300; + } + if (param->rodt) { + data = data | 0x3000 | ((param->reg_AC2 & 0x60000) >> 3); + } + moutdwm(ast, 0x1E6E0034, data | 0x3); + + /* Wait DQI delay lock */ + do { + data = mindwm(ast, 0x1E6E0080); + } while (!(data & 0x40000000)); + /* Wait DQSI delay lock */ + do { + data = mindwm(ast, 0x1E6E0020); + } while (!(data & 0x00000800)); + /* Calibrate the DQSI delay */ + cbr_dll2(ast, param); + + moutdwm(ast, 0x1E6E0120, param->reg_FREQ); + /* ECC Memory Initialization */ +#ifdef ECC + moutdwm(ast, 0x1E6E007C, 0x00000000); + moutdwm(ast, 0x1E6E0070, 0x221); + do { + data = mindwm(ast, 0x1E6E0070); + } while (!(data & 0x00001000)); + moutdwm(ast, 0x1E6E0070, 0x00000000); + moutdwm(ast, 0x1E6E0050, 0x80000000); + moutdwm(ast, 0x1E6E0050, 0x00000000); +#endif + + +} + +static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *param) +{ + u32 trap, trap_AC2, trap_MRS; + + moutdwm(ast, 0x1E6E2000, 0x1688A8A8); + + /* Ger trap info */ + trap = (mindwm(ast, 0x1E6E2070) >> 25) & 0x3; + trap_AC2 = (trap << 20) | (trap << 16); + trap_AC2 += 0x00110000; + trap_MRS = 0x00000040 | (trap << 4); + + + param->reg_MADJ = 0x00034C4C; + param->reg_SADJ = 0x00001800; + param->reg_DRV = 0x000000F0; + param->reg_PERIOD = param->dram_freq; + param->rodt = 0; + + switch (param->dram_freq) { + case 264: + moutdwm(ast, 0x1E6E2020, 0x0130); + param->wodt = 0; + param->reg_AC1 = 0x11101513; + param->reg_AC2 = 0x78117011; + param->reg_DQSIC = 0x00000092; + param->reg_MRS = 0x00000842; + param->reg_EMRS = 0x00000000; + param->reg_DRV = 0x000000F0; + param->reg_IOZ = 0x00000034; + param->reg_DQIDLY = 0x0000005A; + param->reg_FREQ = 0x00004AC0; + param->madj_max = 138; + param->dll2_finetune_step = 3; + break; + case 336: + moutdwm(ast, 0x1E6E2020, 0x0190); + param->wodt = 1; + param->reg_AC1 = 0x22202613; + param->reg_AC2 = 0xAA009016 | trap_AC2; + param->reg_DQSIC = 0x000000BA; + param->reg_MRS = 0x00000A02 | trap_MRS; + param->reg_EMRS = 0x00000040; + param->reg_DRV = 0x000000FA; + param->reg_IOZ = 0x00000034; + param->reg_DQIDLY = 0x00000074; + param->reg_FREQ = 0x00004DC0; + param->madj_max = 96; + param->dll2_finetune_step = 3; + break; + default: + case 396: + moutdwm(ast, 0x1E6E2020, 0x03F1); + param->wodt = 1; + param->rodt = 0; + param->reg_AC1 = 0x33302714; + param->reg_AC2 = 0xCC00B01B | trap_AC2; + param->reg_DQSIC = 0x000000E2; + param->reg_MRS = 0x00000C02 | trap_MRS; + param->reg_EMRS = 0x00000040; + param->reg_DRV = 0x000000FA; + param->reg_IOZ = 0x00000034; + param->reg_DQIDLY = 0x00000089; + param->reg_FREQ = 0x000050C0; + param->madj_max = 96; + param->dll2_finetune_step = 4; + + switch (param->dram_chipid) { + case AST_DRAM_512Mx16: + param->reg_AC2 = 0xCC00B016 | trap_AC2; + break; + default: + case AST_DRAM_1Gx16: + param->reg_AC2 = 0xCC00B01B | trap_AC2; + break; + case AST_DRAM_2Gx16: + param->reg_AC2 = 0xCC00B02B | trap_AC2; + break; + case AST_DRAM_4Gx16: + param->reg_AC2 = 0xCC00B03F | trap_AC2; + break; + } + + break; + + case 408: + moutdwm(ast, 0x1E6E2020, 0x01F0); + param->wodt = 1; + param->rodt = 0; + param->reg_AC1 = 0x33302714; + param->reg_AC2 = 0xCC00B01B | trap_AC2; + param->reg_DQSIC = 0x000000E2; + param->reg_MRS = 0x00000C02 | trap_MRS; + param->reg_EMRS = 0x00000040; + param->reg_DRV = 0x000000FA; + param->reg_IOZ = 0x00000034; + param->reg_DQIDLY = 0x00000089; + param->reg_FREQ = 0x000050C0; + param->madj_max = 96; + param->dll2_finetune_step = 4; + + switch (param->dram_chipid) { + case AST_DRAM_512Mx16: + param->reg_AC2 = 0xCC00B016 | trap_AC2; + break; + default: + case AST_DRAM_1Gx16: + param->reg_AC2 = 0xCC00B01B | trap_AC2; + break; + case AST_DRAM_2Gx16: + param->reg_AC2 = 0xCC00B02B | trap_AC2; + break; + case AST_DRAM_4Gx16: + param->reg_AC2 = 0xCC00B03F | trap_AC2; + break; + } + + break; + case 456: + moutdwm(ast, 0x1E6E2020, 0x0230); + param->wodt = 0; + param->reg_AC1 = 0x33302815; + param->reg_AC2 = 0xCD44B01E; + param->reg_DQSIC = 0x000000FC; + param->reg_MRS = 0x00000E72; + param->reg_EMRS = 0x00000000; + param->reg_DRV = 0x00000000; + param->reg_IOZ = 0x00000034; + param->reg_DQIDLY = 0x00000097; + param->reg_FREQ = 0x000052C0; + param->madj_max = 88; + param->dll2_finetune_step = 3; + break; + case 504: + moutdwm(ast, 0x1E6E2020, 0x0261); + param->wodt = 1; + param->rodt = 1; + param->reg_AC1 = 0x33302815; + param->reg_AC2 = 0xDE44C022; + param->reg_DQSIC = 0x00000117; + param->reg_MRS = 0x00000E72; + param->reg_EMRS = 0x00000040; + param->reg_DRV = 0x0000000A; + param->reg_IOZ = 0x00000045; + param->reg_DQIDLY = 0x000000A0; + param->reg_FREQ = 0x000054C0; + param->madj_max = 79; + param->dll2_finetune_step = 3; + break; + case 528: + moutdwm(ast, 0x1E6E2020, 0x0120); + param->wodt = 1; + param->rodt = 1; + param->reg_AC1 = 0x33302815; + param->reg_AC2 = 0xEF44D024; + param->reg_DQSIC = 0x00000125; + param->reg_MRS = 0x00000E72; + param->reg_EMRS = 0x00000004; + param->reg_DRV = 0x000000F9; + param->reg_IOZ = 0x00000045; + param->reg_DQIDLY = 0x000000A7; + param->reg_FREQ = 0x000055C0; + param->madj_max = 76; + param->dll2_finetune_step = 3; + break; + case 552: + moutdwm(ast, 0x1E6E2020, 0x02A1); + param->wodt = 1; + param->rodt = 1; + param->reg_AC1 = 0x43402915; + param->reg_AC2 = 0xFF44E025; + param->reg_DQSIC = 0x00000132; + param->reg_MRS = 0x00000E72; + param->reg_EMRS = 0x00000040; + param->reg_DRV = 0x0000000A; + param->reg_IOZ = 0x00000045; + param->reg_DQIDLY = 0x000000AD; + param->reg_FREQ = 0x000056C0; + param->madj_max = 76; + param->dll2_finetune_step = 3; + break; + case 576: + moutdwm(ast, 0x1E6E2020, 0x0140); + param->wodt = 1; + param->rodt = 1; + param->reg_AC1 = 0x43402915; + param->reg_AC2 = 0xFF44E027; + param->reg_DQSIC = 0x0000013F; + param->reg_MRS = 0x00000E72; + param->reg_EMRS = 0x00000004; + param->reg_DRV = 0x000000F5; + param->reg_IOZ = 0x00000045; + param->reg_DQIDLY = 0x000000B3; + param->reg_FREQ = 0x000057C0; + param->madj_max = 76; + param->dll2_finetune_step = 3; + break; + } + + switch (param->dram_chipid) { + case AST_DRAM_512Mx16: + param->dram_config = 0x100; + break; + default: + case AST_DRAM_1Gx16: + param->dram_config = 0x121; + break; + case AST_DRAM_2Gx16: + param->dram_config = 0x122; + break; + case AST_DRAM_4Gx16: + param->dram_config = 0x123; + break; + }; /* switch size */ + + switch (param->vram_size) { + default: + case AST_VIDMEM_SIZE_8M: + param->dram_config |= 0x00; + break; + case AST_VIDMEM_SIZE_16M: + param->dram_config |= 0x04; + break; + case AST_VIDMEM_SIZE_32M: + param->dram_config |= 0x08; + break; + case AST_VIDMEM_SIZE_64M: + param->dram_config |= 0x0c; + break; + } +} + +static void ddr2_init(struct ast_private *ast, struct ast2300_dram_param *param) +{ + u32 data, data2; + + moutdwm(ast, 0x1E6E0000, 0xFC600309); + moutdwm(ast, 0x1E6E0018, 0x00000100); + moutdwm(ast, 0x1E6E0024, 0x00000000); + moutdwm(ast, 0x1E6E0064, param->reg_MADJ); + moutdwm(ast, 0x1E6E0068, param->reg_SADJ); + udelay(10); + moutdwm(ast, 0x1E6E0064, param->reg_MADJ | 0xC0000); + udelay(10); + + moutdwm(ast, 0x1E6E0004, param->dram_config); + moutdwm(ast, 0x1E6E0008, 0x90040f); + moutdwm(ast, 0x1E6E0010, param->reg_AC1); + moutdwm(ast, 0x1E6E0014, param->reg_AC2); + moutdwm(ast, 0x1E6E0020, param->reg_DQSIC); + moutdwm(ast, 0x1E6E0080, 0x00000000); + moutdwm(ast, 0x1E6E0084, 0x00000000); + moutdwm(ast, 0x1E6E0088, param->reg_DQIDLY); + moutdwm(ast, 0x1E6E0018, 0x4040A130); + moutdwm(ast, 0x1E6E0018, 0x20402330); + moutdwm(ast, 0x1E6E0038, 0x00000000); + moutdwm(ast, 0x1E6E0040, 0xFF808000); + moutdwm(ast, 0x1E6E0044, 0x88848466); + moutdwm(ast, 0x1E6E0048, 0x44440008); + moutdwm(ast, 0x1E6E004C, 0x00000000); + moutdwm(ast, 0x1E6E0050, 0x80000000); + moutdwm(ast, 0x1E6E0050, 0x00000000); + moutdwm(ast, 0x1E6E0054, 0); + moutdwm(ast, 0x1E6E0060, param->reg_DRV); + moutdwm(ast, 0x1E6E006C, param->reg_IOZ); + moutdwm(ast, 0x1E6E0070, 0x00000000); + moutdwm(ast, 0x1E6E0074, 0x00000000); + moutdwm(ast, 0x1E6E0078, 0x00000000); + moutdwm(ast, 0x1E6E007C, 0x00000000); + + /* Wait MCLK2X lock to MCLK */ + do { + data = mindwm(ast, 0x1E6E001C); + } while (!(data & 0x08000000)); + moutdwm(ast, 0x1E6E0034, 0x00000001); + moutdwm(ast, 0x1E6E000C, 0x00005C04); + udelay(10); + moutdwm(ast, 0x1E6E000C, 0x00000000); + moutdwm(ast, 0x1E6E0034, 0x00000000); + data = mindwm(ast, 0x1E6E001C); + data = (data >> 8) & 0xff; + while ((data & 0x08) || ((data & 0x7) < 2) || (data < 4)) { + data2 = (mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; + if ((data2 & 0xff) > param->madj_max) { + break; + } + moutdwm(ast, 0x1E6E0064, data2); + if (data2 & 0x00100000) { + data2 = ((data2 & 0xff) >> 3) + 3; + } else { + data2 = ((data2 & 0xff) >> 2) + 5; + } + data = mindwm(ast, 0x1E6E0068) & 0xffff00ff; + data2 += data & 0xff; + data = data | (data2 << 8); + moutdwm(ast, 0x1E6E0068, data); + udelay(10); + moutdwm(ast, 0x1E6E0064, mindwm(ast, 0x1E6E0064) | 0xC0000); + udelay(10); + data = mindwm(ast, 0x1E6E0018) & 0xfffff1ff; + moutdwm(ast, 0x1E6E0018, data); + data = data | 0x200; + moutdwm(ast, 0x1E6E0018, data); + do { + data = mindwm(ast, 0x1E6E001C); + } while (!(data & 0x08000000)); + + moutdwm(ast, 0x1E6E0034, 0x00000001); + moutdwm(ast, 0x1E6E000C, 0x00005C04); + udelay(10); + moutdwm(ast, 0x1E6E000C, 0x00000000); + moutdwm(ast, 0x1E6E0034, 0x00000000); + data = mindwm(ast, 0x1E6E001C); + data = (data >> 8) & 0xff; + } + data = mindwm(ast, 0x1E6E0018) | 0xC00; + moutdwm(ast, 0x1E6E0018, data); + + moutdwm(ast, 0x1E6E0034, 0x00000001); + moutdwm(ast, 0x1E6E000C, 0x00000000); + udelay(50); + /* Mode Register Setting */ + moutdwm(ast, 0x1E6E002C, param->reg_MRS | 0x100); + moutdwm(ast, 0x1E6E0030, param->reg_EMRS); + moutdwm(ast, 0x1E6E0028, 0x00000005); + moutdwm(ast, 0x1E6E0028, 0x00000007); + moutdwm(ast, 0x1E6E0028, 0x00000003); + moutdwm(ast, 0x1E6E0028, 0x00000001); + + moutdwm(ast, 0x1E6E000C, 0x00005C08); + moutdwm(ast, 0x1E6E002C, param->reg_MRS); + moutdwm(ast, 0x1E6E0028, 0x00000001); + moutdwm(ast, 0x1E6E0030, param->reg_EMRS | 0x380); + moutdwm(ast, 0x1E6E0028, 0x00000003); + moutdwm(ast, 0x1E6E0030, param->reg_EMRS); + moutdwm(ast, 0x1E6E0028, 0x00000003); + + moutdwm(ast, 0x1E6E000C, 0x7FFF5C01); + data = 0; + if (param->wodt) { + data = 0x500; + } + if (param->rodt) { + data = data | 0x3000 | ((param->reg_AC2 & 0x60000) >> 3); + } + moutdwm(ast, 0x1E6E0034, data | 0x3); + moutdwm(ast, 0x1E6E0120, param->reg_FREQ); + + /* Wait DQI delay lock */ + do { + data = mindwm(ast, 0x1E6E0080); + } while (!(data & 0x40000000)); + /* Wait DQSI delay lock */ + do { + data = mindwm(ast, 0x1E6E0020); + } while (!(data & 0x00000800)); + /* Calibrate the DQSI delay */ + cbr_dll2(ast, param); + + /* ECC Memory Initialization */ +#ifdef ECC + moutdwm(ast, 0x1E6E007C, 0x00000000); + moutdwm(ast, 0x1E6E0070, 0x221); + do { + data = mindwm(ast, 0x1E6E0070); + } while (!(data & 0x00001000)); + moutdwm(ast, 0x1E6E0070, 0x00000000); + moutdwm(ast, 0x1E6E0050, 0x80000000); + moutdwm(ast, 0x1E6E0050, 0x00000000); +#endif + +} + +static void ast_init_dram_2300(struct drm_device *dev) +{ + struct ast_private *ast = dev->dev_private; + struct ast2300_dram_param param; + u32 temp; + u8 reg; + + reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); + if ((reg & 0x80) == 0) {/* vga only */ + ast_write32(ast, 0xf004, 0x1e6e0000); + ast_write32(ast, 0xf000, 0x1); + ast_write32(ast, 0x12000, 0x1688a8a8); + do { + ; + } while (ast_read32(ast, 0x12000) != 0x1); + + ast_write32(ast, 0x10000, 0xfc600309); + do { + ; + } while (ast_read32(ast, 0x10000) != 0x1); + + /* Slow down CPU/AHB CLK in VGA only mode */ + temp = ast_read32(ast, 0x12008); + temp |= 0x73; + ast_write32(ast, 0x12008, temp); + + param.dram_type = AST_DDR3; + if (temp & 0x01000000) + param.dram_type = AST_DDR2; + param.dram_chipid = ast->dram_type; + param.dram_freq = ast->mclk; + param.vram_size = ast->vram_size; + + if (param.dram_type == AST_DDR3) { + get_ddr3_info(ast, ¶m); + ddr3_init(ast, ¶m); + } else { + get_ddr2_info(ast, ¶m); + ddr2_init(ast, ¶m); + } + + temp = mindwm(ast, 0x1e6e2040); + moutdwm(ast, 0x1e6e2040, temp | 0x40); + } + + /* wait ready */ + do { + reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); + } while ((reg & 0x40) == 0); +} + diff --git a/drivers/gpu/drm/ast/ast_tables.h b/drivers/gpu/drm/ast/ast_tables.h new file mode 100644 index 000000000000..95fa6aba26bc --- /dev/null +++ b/drivers/gpu/drm/ast/ast_tables.h @@ -0,0 +1,265 @@ +/* + * Copyright (c) 2005 ASPEED Technology Inc. + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that + * copyright notice and this permission notice appear in supporting + * documentation, and that the name of the authors not be used in + * advertising or publicity pertaining to distribution of the software without + * specific, written prior permission. The authors makes no representations + * about the suitability of this software for any purpose. It is provided + * "as is" without express or implied warranty. + * + * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO + * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + */ +/* Ported from xf86-video-ast driver */ + +#ifndef AST_TABLES_H +#define AST_TABLES_H + +/* Std. Table Index Definition */ +#define TextModeIndex 0 +#define EGAModeIndex 1 +#define VGAModeIndex 2 +#define HiCModeIndex 3 +#define TrueCModeIndex 4 + +#define Charx8Dot 0x00000001 +#define HalfDCLK 0x00000002 +#define DoubleScanMode 0x00000004 +#define LineCompareOff 0x00000008 +#define SyncPP 0x00000000 +#define SyncPN 0x00000040 +#define SyncNP 0x00000080 +#define SyncNN 0x000000C0 +#define HBorder 0x00000020 +#define VBorder 0x00000010 +#define WideScreenMode 0x00000100 + + +/* DCLK Index */ +#define VCLK25_175 0x00 +#define VCLK28_322 0x01 +#define VCLK31_5 0x02 +#define VCLK36 0x03 +#define VCLK40 0x04 +#define VCLK49_5 0x05 +#define VCLK50 0x06 +#define VCLK56_25 0x07 +#define VCLK65 0x08 +#define VCLK75 0x09 +#define VCLK78_75 0x0A +#define VCLK94_5 0x0B +#define VCLK108 0x0C +#define VCLK135 0x0D +#define VCLK157_5 0x0E +#define VCLK162 0x0F +/* #define VCLK193_25 0x10 */ +#define VCLK154 0x10 +#define VCLK83_5 0x11 +#define VCLK106_5 0x12 +#define VCLK146_25 0x13 +#define VCLK148_5 0x14 + +static struct ast_vbios_dclk_info dclk_table[] = { + {0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */ + {0x95, 0x62, 0x03}, /* 01: VCLK28_322 */ + {0x67, 0x63, 0x01}, /* 02: VCLK31_5 */ + {0x76, 0x63, 0x01}, /* 03: VCLK36 */ + {0xEE, 0x67, 0x01}, /* 04: VCLK40 */ + {0x82, 0x62, 0x01}, /* 05: VCLK49_5 */ + {0xC6, 0x64, 0x01}, /* 06: VCLK50 */ + {0x94, 0x62, 0x01}, /* 07: VCLK56_25 */ + {0x80, 0x64, 0x00}, /* 08: VCLK65 */ + {0x7B, 0x63, 0x00}, /* 09: VCLK75 */ + {0x67, 0x62, 0x00}, /* 0A: VCLK78_75 */ + {0x7C, 0x62, 0x00}, /* 0B: VCLK94_5 */ + {0x8E, 0x62, 0x00}, /* 0C: VCLK108 */ + {0x85, 0x24, 0x00}, /* 0D: VCLK135 */ + {0x67, 0x22, 0x00}, /* 0E: VCLK157_5 */ + {0x6A, 0x22, 0x00}, /* 0F: VCLK162 */ + {0x4d, 0x4c, 0x80}, /* 10: VCLK154 */ + {0xa7, 0x78, 0x80}, /* 11: VCLK83.5 */ + {0x28, 0x49, 0x80}, /* 12: VCLK106.5 */ + {0x37, 0x49, 0x80}, /* 13: VCLK146.25 */ + {0x1f, 0x45, 0x80}, /* 14: VCLK148.5 */ +}; + +static struct ast_vbios_stdtable vbios_stdtable[] = { + /* MD_2_3_400 */ + { + 0x67, + {0x00,0x03,0x00,0x02}, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x0c,0x00,0x0f,0x08}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, + /* Mode12/ExtEGATable */ + { + 0xe3, + {0x01,0x0f,0x00,0x06}, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e, + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, + 0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x01,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, + 0xff} + }, + /* ExtVGATable */ + { + 0x2f, + {0x01,0x0f,0x00,0x0e}, + {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, + 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, + 0x01,0x00,0x00,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f, + 0xff} + }, + /* ExtHiCTable */ + { + 0x2f, + {0x01,0x0f,0x00,0x0e}, + {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, + 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, + 0x01,0x00,0x00,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, + 0xff} + }, + /* ExtTrueCTable */ + { + 0x2f, + {0x01,0x0f,0x00,0x0e}, + {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, + 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, + 0x01,0x00,0x00,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, + 0xff} + }, +}; + +static struct ast_vbios_enhtable res_640x480[] = { + { 800, 640, 8, 96, 525, 480, 2, 2, VCLK25_175, /* 60Hz */ + (SyncNN | HBorder | VBorder | Charx8Dot), 60, 1, 0x2E }, + { 832, 640, 16, 40, 520, 480, 1, 3, VCLK31_5, /* 72Hz */ + (SyncNN | HBorder | VBorder | Charx8Dot), 72, 2, 0x2E }, + { 840, 640, 16, 64, 500, 480, 1, 3, VCLK31_5, /* 75Hz */ + (SyncNN | Charx8Dot) , 75, 3, 0x2E }, + { 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* 85Hz */ + (SyncNN | Charx8Dot) , 85, 4, 0x2E }, + { 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* end */ + (SyncNN | Charx8Dot) , 0xFF, 4, 0x2E }, +}; + +static struct ast_vbios_enhtable res_800x600[] = { + {1024, 800, 24, 72, 625, 600, 1, 2, VCLK36, /* 56Hz */ + (SyncPP | Charx8Dot), 56, 1, 0x30 }, + {1056, 800, 40, 128, 628, 600, 1, 4, VCLK40, /* 60Hz */ + (SyncPP | Charx8Dot), 60, 2, 0x30 }, + {1040, 800, 56, 120, 666, 600, 37, 6, VCLK50, /* 72Hz */ + (SyncPP | Charx8Dot), 72, 3, 0x30 }, + {1056, 800, 16, 80, 625, 600, 1, 3, VCLK49_5, /* 75Hz */ + (SyncPP | Charx8Dot), 75, 4, 0x30 }, + {1048, 800, 32, 64, 631, 600, 1, 3, VCLK56_25, /* 85Hz */ + (SyncPP | Charx8Dot), 84, 5, 0x30 }, + {1048, 800, 32, 64, 631, 600, 1, 3, VCLK56_25, /* end */ + (SyncPP | Charx8Dot), 0xFF, 5, 0x30 }, +}; + + +static struct ast_vbios_enhtable res_1024x768[] = { + {1344, 1024, 24, 136, 806, 768, 3, 6, VCLK65, /* 60Hz */ + (SyncNN | Charx8Dot), 60, 1, 0x31 }, + {1328, 1024, 24, 136, 806, 768, 3, 6, VCLK75, /* 70Hz */ + (SyncNN | Charx8Dot), 70, 2, 0x31 }, + {1312, 1024, 16, 96, 800, 768, 1, 3, VCLK78_75, /* 75Hz */ + (SyncPP | Charx8Dot), 75, 3, 0x31 }, + {1376, 1024, 48, 96, 808, 768, 1, 3, VCLK94_5, /* 85Hz */ + (SyncPP | Charx8Dot), 84, 4, 0x31 }, + {1376, 1024, 48, 96, 808, 768, 1, 3, VCLK94_5, /* end */ + (SyncPP | Charx8Dot), 0xFF, 4, 0x31 }, +}; + +static struct ast_vbios_enhtable res_1280x1024[] = { + {1688, 1280, 48, 112, 1066, 1024, 1, 3, VCLK108, /* 60Hz */ + (SyncPP | Charx8Dot), 60, 1, 0x32 }, + {1688, 1280, 16, 144, 1066, 1024, 1, 3, VCLK135, /* 75Hz */ + (SyncPP | Charx8Dot), 75, 2, 0x32 }, + {1728, 1280, 64, 160, 1072, 1024, 1, 3, VCLK157_5, /* 85Hz */ + (SyncPP | Charx8Dot), 85, 3, 0x32 }, + {1728, 1280, 64, 160, 1072, 1024, 1, 3, VCLK157_5, /* end */ + (SyncPP | Charx8Dot), 0xFF, 3, 0x32 }, +}; + +static struct ast_vbios_enhtable res_1600x1200[] = { + {2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162, /* 60Hz */ + (SyncPP | Charx8Dot), 60, 1, 0x33 }, + {2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162, /* end */ + (SyncPP | Charx8Dot), 0xFF, 1, 0x33 }, +}; + +static struct ast_vbios_enhtable res_1920x1200[] = { + {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz */ + (SyncNP | Charx8Dot), 60, 1, 0x34 }, + {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz */ + (SyncNP | Charx8Dot), 0xFF, 1, 0x34 }, +}; + +/* 16:10 */ +static struct ast_vbios_enhtable res_1280x800[] = { + {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */ + (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 60, 1, 0x35 }, + {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */ + (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 0xFF, 1, 0x35 }, + +}; + +static struct ast_vbios_enhtable res_1440x900[] = { + {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */ + (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 60, 1, 0x36 }, + {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */ + (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 0xFF, 1, 0x36 }, +}; + +static struct ast_vbios_enhtable res_1680x1050[] = { + {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */ + (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 60, 1, 0x37 }, + {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */ + (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 0xFF, 1, 0x37 }, +}; + +/* HDTV */ +static struct ast_vbios_enhtable res_1920x1080[] = { + {2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5, /* 60Hz */ + (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode), 60, 1, 0x38 }, + {2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5, /* 60Hz */ + (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode), 0xFF, 1, 0x38 }, +}; +#endif diff --git a/drivers/gpu/drm/ast/ast_ttm.c b/drivers/gpu/drm/ast/ast_ttm.c new file mode 100644 index 000000000000..09da3393c527 --- /dev/null +++ b/drivers/gpu/drm/ast/ast_ttm.c @@ -0,0 +1,453 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ +/* + * Authors: Dave Airlie + */ +#include +#include "ast_drv.h" +#include + +static inline struct ast_private * +ast_bdev(struct ttm_bo_device *bd) +{ + return container_of(bd, struct ast_private, ttm.bdev); +} + +static int +ast_ttm_mem_global_init(struct drm_global_reference *ref) +{ + return ttm_mem_global_init(ref->object); +} + +static void +ast_ttm_mem_global_release(struct drm_global_reference *ref) +{ + ttm_mem_global_release(ref->object); +} + +static int ast_ttm_global_init(struct ast_private *ast) +{ + struct drm_global_reference *global_ref; + int r; + + global_ref = &ast->ttm.mem_global_ref; + global_ref->global_type = DRM_GLOBAL_TTM_MEM; + global_ref->size = sizeof(struct ttm_mem_global); + global_ref->init = &ast_ttm_mem_global_init; + global_ref->release = &ast_ttm_mem_global_release; + r = drm_global_item_ref(global_ref); + if (r != 0) { + DRM_ERROR("Failed setting up TTM memory accounting " + "subsystem.\n"); + return r; + } + + ast->ttm.bo_global_ref.mem_glob = + ast->ttm.mem_global_ref.object; + global_ref = &ast->ttm.bo_global_ref.ref; + global_ref->global_type = DRM_GLOBAL_TTM_BO; + global_ref->size = sizeof(struct ttm_bo_global); + global_ref->init = &ttm_bo_global_init; + global_ref->release = &ttm_bo_global_release; + r = drm_global_item_ref(global_ref); + if (r != 0) { + DRM_ERROR("Failed setting up TTM BO subsystem.\n"); + drm_global_item_unref(&ast->ttm.mem_global_ref); + return r; + } + return 0; +} + +void +ast_ttm_global_release(struct ast_private *ast) +{ + if (ast->ttm.mem_global_ref.release == NULL) + return; + + drm_global_item_unref(&ast->ttm.bo_global_ref.ref); + drm_global_item_unref(&ast->ttm.mem_global_ref); + ast->ttm.mem_global_ref.release = NULL; +} + + +static void ast_bo_ttm_destroy(struct ttm_buffer_object *tbo) +{ + struct ast_bo *bo; + + bo = container_of(tbo, struct ast_bo, bo); + + drm_gem_object_release(&bo->gem); + kfree(bo); +} + +bool ast_ttm_bo_is_ast_bo(struct ttm_buffer_object *bo) +{ + if (bo->destroy == &ast_bo_ttm_destroy) + return true; + return false; +} + +static int +ast_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, + struct ttm_mem_type_manager *man) +{ + switch (type) { + case TTM_PL_SYSTEM: + man->flags = TTM_MEMTYPE_FLAG_MAPPABLE; + man->available_caching = TTM_PL_MASK_CACHING; + man->default_caching = TTM_PL_FLAG_CACHED; + break; + case TTM_PL_VRAM: + man->func = &ttm_bo_manager_func; + man->flags = TTM_MEMTYPE_FLAG_FIXED | + TTM_MEMTYPE_FLAG_MAPPABLE; + man->available_caching = TTM_PL_FLAG_UNCACHED | + TTM_PL_FLAG_WC; + man->default_caching = TTM_PL_FLAG_WC; + break; + default: + DRM_ERROR("Unsupported memory type %u\n", (unsigned)type); + return -EINVAL; + } + return 0; +} + +static void +ast_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl) +{ + struct ast_bo *astbo = ast_bo(bo); + + if (!ast_ttm_bo_is_ast_bo(bo)) + return; + + ast_ttm_placement(astbo, TTM_PL_FLAG_SYSTEM); + *pl = astbo->placement; +} + +static int ast_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp) +{ + return 0; +} + +static int ast_ttm_io_mem_reserve(struct ttm_bo_device *bdev, + struct ttm_mem_reg *mem) +{ + struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type]; + struct ast_private *ast = ast_bdev(bdev); + + mem->bus.addr = NULL; + mem->bus.offset = 0; + mem->bus.size = mem->num_pages << PAGE_SHIFT; + mem->bus.base = 0; + mem->bus.is_iomem = false; + if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE)) + return -EINVAL; + switch (mem->mem_type) { + case TTM_PL_SYSTEM: + /* system memory */ + return 0; + case TTM_PL_VRAM: + mem->bus.offset = mem->start << PAGE_SHIFT; + mem->bus.base = pci_resource_start(ast->dev->pdev, 0); + mem->bus.is_iomem = true; + break; + default: + return -EINVAL; + break; + } + return 0; +} + +static void ast_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem) +{ +} + +static int ast_bo_move(struct ttm_buffer_object *bo, + bool evict, bool interruptible, + bool no_wait_gpu, + struct ttm_mem_reg *new_mem) +{ + int r; + r = ttm_bo_move_memcpy(bo, evict, no_wait_gpu, new_mem); + return r; +} + + +static void ast_ttm_backend_destroy(struct ttm_tt *tt) +{ + ttm_tt_fini(tt); + kfree(tt); +} + +static struct ttm_backend_func ast_tt_backend_func = { + .destroy = &ast_ttm_backend_destroy, +}; + + +struct ttm_tt *ast_ttm_tt_create(struct ttm_bo_device *bdev, + unsigned long size, uint32_t page_flags, + struct page *dummy_read_page) +{ + struct ttm_tt *tt; + + tt = kzalloc(sizeof(struct ttm_tt), GFP_KERNEL); + if (tt == NULL) + return NULL; + tt->func = &ast_tt_backend_func; + if (ttm_tt_init(tt, bdev, size, page_flags, dummy_read_page)) { + kfree(tt); + return NULL; + } + return tt; +} + +static int ast_ttm_tt_populate(struct ttm_tt *ttm) +{ + return ttm_pool_populate(ttm); +} + +static void ast_ttm_tt_unpopulate(struct ttm_tt *ttm) +{ + ttm_pool_unpopulate(ttm); +} + +struct ttm_bo_driver ast_bo_driver = { + .ttm_tt_create = ast_ttm_tt_create, + .ttm_tt_populate = ast_ttm_tt_populate, + .ttm_tt_unpopulate = ast_ttm_tt_unpopulate, + .init_mem_type = ast_bo_init_mem_type, + .evict_flags = ast_bo_evict_flags, + .move = ast_bo_move, + .verify_access = ast_bo_verify_access, + .io_mem_reserve = &ast_ttm_io_mem_reserve, + .io_mem_free = &ast_ttm_io_mem_free, +}; + +int ast_mm_init(struct ast_private *ast) +{ + int ret; + struct drm_device *dev = ast->dev; + struct ttm_bo_device *bdev = &ast->ttm.bdev; + + ret = ast_ttm_global_init(ast); + if (ret) + return ret; + + ret = ttm_bo_device_init(&ast->ttm.bdev, + ast->ttm.bo_global_ref.ref.object, + &ast_bo_driver, DRM_FILE_PAGE_OFFSET, + true); + if (ret) { + DRM_ERROR("Error initialising bo driver; %d\n", ret); + return ret; + } + + ret = ttm_bo_init_mm(bdev, TTM_PL_VRAM, + ast->vram_size >> PAGE_SHIFT); + if (ret) { + DRM_ERROR("Failed ttm VRAM init: %d\n", ret); + return ret; + } + + ast->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 0), + pci_resource_len(dev->pdev, 0), + DRM_MTRR_WC); + + return 0; +} + +void ast_mm_fini(struct ast_private *ast) +{ + struct drm_device *dev = ast->dev; + ttm_bo_device_release(&ast->ttm.bdev); + + ast_ttm_global_release(ast); + + if (ast->fb_mtrr >= 0) { + drm_mtrr_del(ast->fb_mtrr, + pci_resource_start(dev->pdev, 0), + pci_resource_len(dev->pdev, 0), DRM_MTRR_WC); + ast->fb_mtrr = -1; + } +} + +void ast_ttm_placement(struct ast_bo *bo, int domain) +{ + u32 c = 0; + bo->placement.fpfn = 0; + bo->placement.lpfn = 0; + bo->placement.placement = bo->placements; + bo->placement.busy_placement = bo->placements; + if (domain & TTM_PL_FLAG_VRAM) + bo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM; + if (domain & TTM_PL_FLAG_SYSTEM) + bo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; + if (!c) + bo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; + bo->placement.num_placement = c; + bo->placement.num_busy_placement = c; +} + +int ast_bo_reserve(struct ast_bo *bo, bool no_wait) +{ + int ret; + + ret = ttm_bo_reserve(&bo->bo, true, no_wait, false, 0); + if (ret) { + if (ret != -ERESTARTSYS && ret != -EBUSY) + DRM_ERROR("reserve failed %p\n", bo); + return ret; + } + return 0; +} + +void ast_bo_unreserve(struct ast_bo *bo) +{ + ttm_bo_unreserve(&bo->bo); +} + +int ast_bo_create(struct drm_device *dev, int size, int align, + uint32_t flags, struct ast_bo **pastbo) +{ + struct ast_private *ast = dev->dev_private; + struct ast_bo *astbo; + size_t acc_size; + int ret; + + astbo = kzalloc(sizeof(struct ast_bo), GFP_KERNEL); + if (!astbo) + return -ENOMEM; + + ret = drm_gem_object_init(dev, &astbo->gem, size); + if (ret) { + kfree(astbo); + return ret; + } + + astbo->gem.driver_private = NULL; + astbo->bo.bdev = &ast->ttm.bdev; + + ast_ttm_placement(astbo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM); + + acc_size = ttm_bo_dma_acc_size(&ast->ttm.bdev, size, + sizeof(struct ast_bo)); + + ret = ttm_bo_init(&ast->ttm.bdev, &astbo->bo, size, + ttm_bo_type_device, &astbo->placement, + align >> PAGE_SHIFT, false, NULL, acc_size, + NULL, ast_bo_ttm_destroy); + if (ret) + return ret; + + *pastbo = astbo; + return 0; +} + +static inline u64 ast_bo_gpu_offset(struct ast_bo *bo) +{ + return bo->bo.offset; +} + +int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr) +{ + int i, ret; + + if (bo->pin_count) { + bo->pin_count++; + if (gpu_addr) + *gpu_addr = ast_bo_gpu_offset(bo); + } + + ast_ttm_placement(bo, pl_flag); + for (i = 0; i < bo->placement.num_placement; i++) + bo->placements[i] |= TTM_PL_FLAG_NO_EVICT; + ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false); + if (ret) + return ret; + + bo->pin_count = 1; + if (gpu_addr) + *gpu_addr = ast_bo_gpu_offset(bo); + return 0; +} + +int ast_bo_unpin(struct ast_bo *bo) +{ + int i, ret; + if (!bo->pin_count) { + DRM_ERROR("unpin bad %p\n", bo); + return 0; + } + bo->pin_count--; + if (bo->pin_count) + return 0; + + for (i = 0; i < bo->placement.num_placement ; i++) + bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT; + ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false); + if (ret) + return ret; + + return 0; +} + +int ast_bo_push_sysram(struct ast_bo *bo) +{ + int i, ret; + if (!bo->pin_count) { + DRM_ERROR("unpin bad %p\n", bo); + return 0; + } + bo->pin_count--; + if (bo->pin_count) + return 0; + + if (bo->kmap.virtual) + ttm_bo_kunmap(&bo->kmap); + + ast_ttm_placement(bo, TTM_PL_FLAG_SYSTEM); + for (i = 0; i < bo->placement.num_placement ; i++) + bo->placements[i] |= TTM_PL_FLAG_NO_EVICT; + + ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false); + if (ret) { + DRM_ERROR("pushing to VRAM failed\n"); + return ret; + } + return 0; +} + +int ast_mmap(struct file *filp, struct vm_area_struct *vma) +{ + struct drm_file *file_priv; + struct ast_private *ast; + + if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) + return drm_mmap(filp, vma); + + file_priv = filp->private_data; + ast = file_priv->minor->dev->dev_private; + return ttm_bo_mmap(filp, vma, &ast->ttm.bdev); +} diff --git a/drivers/gpu/drm/ati_pcigart.c b/drivers/gpu/drm/ati_pcigart.c index 9afe495c12c7..c399dea27a3b 100644 --- a/drivers/gpu/drm/ati_pcigart.c +++ b/drivers/gpu/drm/ati_pcigart.c @@ -32,7 +32,7 @@ */ #include -#include "drmP.h" +#include # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ diff --git a/drivers/gpu/drm/cirrus/Kconfig b/drivers/gpu/drm/cirrus/Kconfig new file mode 100644 index 000000000000..bf67b22723f9 --- /dev/null +++ b/drivers/gpu/drm/cirrus/Kconfig @@ -0,0 +1,12 @@ +config DRM_CIRRUS_QEMU + tristate "Cirrus driver for QEMU emulated device" + depends on DRM && PCI + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + select DRM_KMS_HELPER + select DRM_TTM + help + This is a KMS driver for emulated cirrus device in qemu. + It is *NOT* intended for real cirrus devices. This requires + the modesetting userspace X.org driver. diff --git a/drivers/gpu/drm/cirrus/Makefile b/drivers/gpu/drm/cirrus/Makefile new file mode 100644 index 000000000000..69ffe7006d55 --- /dev/null +++ b/drivers/gpu/drm/cirrus/Makefile @@ -0,0 +1,5 @@ +ccflags-y := -Iinclude/drm +cirrus-y := cirrus_main.o cirrus_mode.o \ + cirrus_drv.o cirrus_fbdev.o cirrus_ttm.o + +obj-$(CONFIG_DRM_CIRRUS_QEMU) += cirrus.o diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.c b/drivers/gpu/drm/cirrus/cirrus_drv.c new file mode 100644 index 000000000000..8ecb601152ef --- /dev/null +++ b/drivers/gpu/drm/cirrus/cirrus_drv.c @@ -0,0 +1,138 @@ +/* + * Copyright 2012 Red Hat + * + * This file is subject to the terms and conditions of the GNU General + * Public License version 2. See the file COPYING in the main + * directory of this archive for more details. + * + * Authors: Matthew Garrett + * Dave Airlie + */ +#include +#include +#include + +#include "cirrus_drv.h" + +int cirrus_modeset = -1; + +MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); +module_param_named(modeset, cirrus_modeset, int, 0400); + +/* + * This is the generic driver code. This binds the driver to the drm core, + * which then performs further device association and calls our graphics init + * functions + */ + +static struct drm_driver driver; + +/* only bind to the cirrus chip in qemu */ +static DEFINE_PCI_DEVICE_TABLE(pciidlist) = { + { PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5446, 0x1af4, 0x1100, 0, + 0, 0 }, + {0,} +}; + + +static int cirrus_kick_out_firmware_fb(struct pci_dev *pdev) +{ + struct apertures_struct *ap; + bool primary = false; + + ap = alloc_apertures(1); + if (!ap) + return -ENOMEM; + + ap->ranges[0].base = pci_resource_start(pdev, 0); + ap->ranges[0].size = pci_resource_len(pdev, 0); + +#ifdef CONFIG_X86 + primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; +#endif + remove_conflicting_framebuffers(ap, "cirrusdrmfb", primary); + kfree(ap); + + return 0; +} + +static int cirrus_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + int ret; + + ret = cirrus_kick_out_firmware_fb(pdev); + if (ret) + return ret; + + return drm_get_pci_dev(pdev, ent, &driver); +} + +static void cirrus_pci_remove(struct pci_dev *pdev) +{ + struct drm_device *dev = pci_get_drvdata(pdev); + + drm_put_dev(dev); +} + +static const struct file_operations cirrus_driver_fops = { + .owner = THIS_MODULE, + .open = drm_open, + .release = drm_release, + .unlocked_ioctl = drm_ioctl, + .mmap = cirrus_mmap, + .poll = drm_poll, +#ifdef CONFIG_COMPAT + .compat_ioctl = drm_compat_ioctl, +#endif + .fasync = drm_fasync, +}; +static struct drm_driver driver = { + .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_USE_MTRR, + .load = cirrus_driver_load, + .unload = cirrus_driver_unload, + .fops = &cirrus_driver_fops, + .name = DRIVER_NAME, + .desc = DRIVER_DESC, + .date = DRIVER_DATE, + .major = DRIVER_MAJOR, + .minor = DRIVER_MINOR, + .patchlevel = DRIVER_PATCHLEVEL, + .gem_init_object = cirrus_gem_init_object, + .gem_free_object = cirrus_gem_free_object, + .dumb_create = cirrus_dumb_create, + .dumb_map_offset = cirrus_dumb_mmap_offset, + .dumb_destroy = cirrus_dumb_destroy, +}; + +static struct pci_driver cirrus_pci_driver = { + .name = DRIVER_NAME, + .id_table = pciidlist, + .probe = cirrus_pci_probe, + .remove = cirrus_pci_remove, +}; + +static int __init cirrus_init(void) +{ +#ifdef CONFIG_VGA_CONSOLE + if (vgacon_text_force() && cirrus_modeset == -1) + return -EINVAL; +#endif + + if (cirrus_modeset == 0) + return -EINVAL; + return drm_pci_init(&driver, &cirrus_pci_driver); +} + +static void __exit cirrus_exit(void) +{ + drm_pci_exit(&driver, &cirrus_pci_driver); +} + +module_init(cirrus_init); +module_exit(cirrus_exit); + +MODULE_DEVICE_TABLE(pci, pciidlist); +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_LICENSE("GPL"); diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.h b/drivers/gpu/drm/cirrus/cirrus_drv.h new file mode 100644 index 000000000000..7ca059596887 --- /dev/null +++ b/drivers/gpu/drm/cirrus/cirrus_drv.h @@ -0,0 +1,247 @@ +/* + * Copyright 2012 Red Hat + * + * This file is subject to the terms and conditions of the GNU General + * Public License version 2. See the file COPYING in the main + * directory of this archive for more details. + * + * Authors: Matthew Garrett + * Dave Airlie + */ +#ifndef __CIRRUS_DRV_H__ +#define __CIRRUS_DRV_H__ + +#include