From e1646624638e11dafa1dd317897ef4ddaeae9c64 Mon Sep 17 00:00:00 2001
From: Shashank Mittal <mittals@codeaurora.org>
Date: Wed, 29 Apr 2015 16:43:36 -0700
Subject: [PATCH] linux-ramdump-parser-v2: Add support to call DCC parser
Add support to parse DCC captured data from crash dumps and produce
human readable result.
Change-Id: I898b404b074fc037e339bf535c27bf190619cc9d
---
linux-ramdump-parser-v2/dcc.py | 89 +++++++++++++++++++++++
linux-ramdump-parser-v2/debug_image_v2.py | 57 +++++++++++++++
linux-ramdump-parser-v2/ramdump.py | 1 +
3 files changed, 147 insertions(+)
create mode 100644 linux-ramdump-parser-v2/dcc.py
diff --git a/linux-ramdump-parser-v2/dcc.py b/linux-ramdump-parser-v2/dcc.py
new file mode 100644
index 0000000..79bd6c9
--- /dev/null
+++ b/linux-ramdump-parser-v2/dcc.py
@@ -0,0 +1,89 @@
+# Copyright (c) 2015, The Linux Foundation. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License version 2 and
+# only version 2 as published by the Free Software Foundation.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+
+import struct
+from print_out import print_out_str
+from ramparse import VERSION
+
+dcc_register_list = [
+ 'DCC_HW_VERSION',
+ 'DCC_HW_INFO',
+ 'DCC_CGC_CFG',
+ 'DCC_LL',
+ 'DCC_RAM_CFG',
+ 'DCC_CFG',
+ 'DCC_SW_CTL',
+ 'DCC_STATUS',
+ 'DCC_FETCH_ADDR',
+ 'DCC_SRAM_ADDR',
+ 'DCC_INT_ENABLE',
+ 'DCC_INT_STATUS',
+ 'DCC_QSB_CFG'
+ ]
+
+# DCC regs hash table
+dcc_regs = {}
+
+class DccRegDump():
+
+ def __init__(self, start, end):
+ self.start_addr = start
+ self.end_addr = end
+
+ def parse_all_regs(self, ram_dump):
+ num_reg = len(dcc_register_list)
+ if (self.start_addr + 4 * num_reg) > self.end_addr:
+ return False
+
+ for reg in dcc_register_list:
+ dcc_regs[reg] = ram_dump.read_u32(self.start_addr, False)
+ self.start_addr += 4
+ return True
+
+ def dump_all_regs(self, ram_dump):
+ outfile = ram_dump.open_file('dcc_regs.txt')
+ outfile.write('DCC registers:\n')
+ for reg in dcc_register_list:
+ outfile.write('{0} : 0x{1:08x}\n'.format(reg, dcc_regs[reg]))
+ outfile.close()
+
+class DccSramDump():
+ def __init__(self, start, end):
+ self.start_addr = start
+ self.end_addr = end
+
+ def dump_sram_img(self, ram_dump):
+ if self.start_addr >= self.end_addr:
+ return False
+
+ rsz = self.end_addr - self.start_addr
+
+ if dcc_regs.has_key('DCC_HW_INFO') == False \
+ or dcc_regs['DCC_HW_INFO'] == 0:
+ print_out_str('DCC HW Info missing! Skipping sram dump...')
+ return False
+
+ if dcc_regs['DCC_CFG'] & 0x1:
+ print_out_str('DCC is configured in CRC mode. Skipping sram dump ...')
+ return False
+
+ if dcc_regs['DCC_RAM_CFG'] == 0:
+ print_out_str('No config found in DCC SRAM. Skipping sram dump ...')
+ return False
+
+ sramfile = ram_dump.open_file('sram.bin')
+ for i in range(0, rsz):
+ val = ram_dump.read_byte(self.start_addr + i, False)
+ sramfile.write(struct.pack('<B', val))
+
+ sramfile.close()
+
+ return True
diff --git a/linux-ramdump-parser-v2/debug_image_v2.py b/linux-ramdump-parser-v2/debug_image_v2.py
index 436c1ba..87638fc 100755
--- a/linux-ramdump-parser-v2/debug_image_v2.py
+++ b/linux-ramdump-parser-v2/debug_image_v2.py
@@ -16,7 +16,9 @@ import shutil
import os
import platform
import subprocess
+import sys
+from dcc import DccRegDump, DccSramDump
from pmic import PmicRegDump
from print_out import print_out_str, print_out_exception
from qdss import QDSSDump
@@ -57,6 +59,8 @@ client_table = {
'MSM_DUMP_DATA_OCMEM': 'parse_ocmem',
'MSM_DUMP_DATA_DBGUI_REG' : 'parse_qdss_common',
'MSM_DUMP_DATA_PMIC': 'parse_pmic',
+ 'MSM_DUMP_DATA_DCC_REG':'parse_dcc_reg',
+ 'MSM_DUMP_DATA_DCC_SRAM':'parse_dcc_sram',
'MSM_DUMP_DATA_TMC_ETF': 'parse_qdss_common',
'MSM_DUMP_DATA_TMC_REG': 'parse_qdss_common',
'MSM_DUMP_DATA_L2_TLB': 'parse_l2_tlb',
@@ -102,6 +106,33 @@ class DebugImage_v2():
regs.dump_all_regs(ram_dump)
+ def parse_dcc_reg(self, version, start, end, client_id, ram_dump):
+ client_name = self.dump_data_id_lookup_table[client_id]
+
+ print_out_str(
+ 'Parsing {0} context start {1:x} end {2:x}'.format(client_name, start, end))
+
+ regs = DccRegDump(start, end)
+ if regs.parse_all_regs(ram_dump) is False:
+ print_out_str('!!! Could not get registers from DCC register dump')
+ return
+
+ regs.dump_all_regs(ram_dump)
+ return
+
+ def parse_dcc_sram(self, version, start, end, client_id, ram_dump):
+ client_name = self.dump_data_id_lookup_table[client_id]
+
+ print_out_str(
+ 'Parsing {0} context start {1:x} end {2:x}'.format(client_name, start, end))
+
+ regs = DccSramDump(start, end)
+ if regs.dump_sram_img(ram_dump) is False:
+ print_out_str('!!! Could not dump SRAM')
+ else:
+ ram_dump.dcc = True
+ return
+
def parse_qdss_common(self, version, start, end, client_id, ram_dump):
client_name = self.dump_data_id_lookup_table[client_id]
@@ -250,6 +281,30 @@ class DebugImage_v2():
subprocess.call('{0} -c {1} exit'.format(qtf_path, port))
p.communicate('quit')
+ def parse_dcc(self, ram_dump):
+ out_dir = ram_dump.outdir
+
+ dcc_parser_path = os.path.join(os.path.dirname(__file__), '..', 'dcc_parser', 'dcc_parser.py')
+
+ if dcc_parser_path is None:
+ print_out_str("!!! Incorrect path for DCC specified.")
+ return
+
+ if not os.path.exists(dcc_parser_path):
+ print_out_str("!!! dcc_parser_path {0} does not exist! Check your settings!".format(dcc_parser_path))
+ return
+
+ if os.path.getsize(os.path.join(out_dir, 'sram.bin')) > 0:
+ sram_file = os.path.join(out_dir, 'sram.bin')
+ else:
+ return
+
+ p = subprocess.Popen([sys.executable, dcc_parser_path, '-s', sram_file, '--out-dir', out_dir],
+ stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+
+ print_out_str('--------')
+ print_out_str(p.communicate()[0])
+
def parse_dump_v2(self, ram_dump):
self.dump_type_lookup_table = ram_dump.gdbmi.get_enum_lookup_table(
'msm_dump_type', 2)
@@ -418,3 +473,5 @@ class DebugImage_v2():
self.qdss.dump_all(ram_dump)
if ram_dump.qtf:
self.parse_qtf(ram_dump)
+ if ram_dump.dcc:
+ self.parse_dcc(ram_dump)
diff --git a/linux-ramdump-parser-v2/ramdump.py b/linux-ramdump-parser-v2/ramdump.py
index 8c77aba..d452fbc 100644
--- a/linux-ramdump-parser-v2/ramdump.py
+++ b/linux-ramdump-parser-v2/ramdump.py
@@ -460,6 +460,7 @@ class RamDump():
self.thread_size = 8192
self.qtf_path = options.qtf_path
self.qtf = options.qtf
+ self.dcc = False
self.t32_host_system = options.t32_host_system or None
self.ipc_log_test = options.ipc_test
self.ipc_log_skip = options.ipc_skip
--
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