diff --git a/linux-ramdump-parser-v2/debug_image_v2.py b/linux-ramdump-parser-v2/debug_image_v2.py
index 826e798ac7c0b79ee98672b037d0545f52643730..034191ab30f8413f6de54152c30c8875d60c2a38 100644
--- a/linux-ramdump-parser-v2/debug_image_v2.py
+++ b/linux-ramdump-parser-v2/debug_image_v2.py
@@ -20,6 +20,7 @@ import subprocess
 import sys
 import time
 import local_settings
+from scandump_reader import Scandump_v2
 
 from dcc import DccRegDump, DccSramDump
 from pmic import PmicRegDump
@@ -137,6 +138,7 @@ class DebugImage_v2():
         if client_id == client.MSM_DUMP_DATA_SCANDUMP:
             output = os.path.join(ram_dump.outdir, scandump_file_prefix)
             input = os.path.join(ram_dump.outdir, "core.bin")
+            core_num = client_id & 0xF
         elif client_id >= client.MSM_DUMP_DATA_SCANDUMP_PER_CPU:
             core_num = client_id & 0xF
             output = '{0}_{1:x}'.format(scandump_file_prefix, core_num)
@@ -154,6 +156,10 @@ class DebugImage_v2():
             header_bin.write(struct.pack("<B", val))
         header_bin.close()
         subprocess.call('python {0} -d {1} -o {2} -f {3}'.format(scan_wrapper_path, input, output, arch))
+        sv2 = Scandump_v2(core_num,ram_dump,version)
+        reg_info = sv2.prepare_dict()
+        if reg_info is not None:
+            sv2.dump_core_pc(ram_dump)
         return
 
     def parse_cpu_ctx(self, version, start, end, client_id, ram_dump):
diff --git a/linux-ramdump-parser-v2/scandump_reader.py b/linux-ramdump-parser-v2/scandump_reader.py
old mode 100755
new mode 100644
index eb2e3da87882305457240bbf95cfc20b213cad39..d71d40251d91f4ff7b7a4b4cf675c865f3a5701a
--- a/linux-ramdump-parser-v2/scandump_reader.py
+++ b/linux-ramdump-parser-v2/scandump_reader.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2016, The Linux Foundation. All rights reserved.
+# Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License version 2 and
@@ -35,19 +35,62 @@ class Scandump_v2():
         self.regs['cpu_state_4'] = 0
         self.regs['cpu_state_5'] = 0
 
-
     def prepare_dict(self):
         input_file = "scandump"
-        input_file_name = "{0}_core{1}.cmm".format(input_file, (self.core - 4))
+        input_file_name = "{0}_core_{1}.cmm".format(input_file, (self.core))
         output = os.path.join(self.ramdump.outdir, input_file_name)
-        fd = open(output, "r")
-        for line in fd:
-            matchObj = re.match('^REGISTER.SET ([xse].*[0-9]+)\s(0x[0-9a-f]{0,})', line, re.M | re.I)
-            if matchObj:
-                regVal = matchObj.group(2)
-                if regVal == "0x":
-                    regVal = "0x0000000000000000"
-                self.regs[(matchObj.group(1)).lower()] = int(regVal, 16)
-            else:
-                continue
-        return self.regs
+        if os.path.exists(output):
+            fd = open(output, "r")
+            for line in fd:
+                matchObj = re.match('^REGISTER.SET ([xse].*[0-9]+)\s(0x[0-9a-f]{0,})', line, re.M | re.I)
+                if matchObj:
+                    regVal = matchObj.group(2)
+                    if regVal == "0x":
+                        regVal = "0x0000000000000000"
+                    self.regs[(matchObj.group(1)).lower()] = int(regVal, 16)
+                else:
+                    matchObj = re.match('^REGISTER.SET (PC)\s(0x[0-9a-f]{0,})', line, re.M | re.I)
+                    if matchObj:
+                        regVal = matchObj.group(2)
+                        if regVal == "0x":
+                            regVal = "0x0000000000000000"
+                        self.regs[matchObj.group(1).lower()] = int(regVal, 16)
+                    else:
+                        continue
+            return self.regs
+        else:
+            return None
+
+    def dump_core_pc(self, ram_dump):
+        pc = self.regs['pc']
+        if ram_dump.arm64:
+            lr = self.regs['x30']
+            bt = self.regs['sp_el1']
+            fp = self.regs['x29']
+        else:
+            lr = self.regs['r14_svc']
+            bt = self.regs['r13_svc']
+            fp = self.regs['r11']
+
+        a = ram_dump.unwind_lookup(pc)
+        if a is not None:
+            symname, offset = a
+        else:
+            symname = 'UNKNOWN'
+            offset = 0
+        print_out_str(
+            'Core {3} PC: {0}+{1:x} <{2:x}>'.format(symname, offset,
+                                                    pc, self.core))
+        a = ram_dump.unwind_lookup(lr)
+        if a is not None:
+            symname, offset = a
+        else:
+            symname = 'UNKNOWN'
+            offset = 0
+        print_out_str(
+            'Core {3} LR: {0}+{1:x} <{2:x}>'.format(symname, offset,
+                                                    lr, self.core))
+        print_out_str('')
+        ram_dump.unwind.unwind_backtrace(bt, fp, pc, lr, '')
+        print_out_str('')
+