diff --git a/SPIRV/GlslangToSpv.cpp b/SPIRV/GlslangToSpv.cpp
index 5deb43bd6fda45c48df32da0194b099891432f03..96904965532be65b8170cf71d365ce369e993a09 100755
--- a/SPIRV/GlslangToSpv.cpp
+++ b/SPIRV/GlslangToSpv.cpp
@@ -6086,6 +6086,8 @@ void GlslangToSpv(const glslang::TIntermediate& intermediate, std::vector<unsign
});
optimizer.RegisterPass(CreateInlineExhaustivePass());
+ optimizer.RegisterPass(CreateEliminateDeadFunctionsPass());
+ optimizer.RegisterPass(CreateScalarReplacementPass());
optimizer.RegisterPass(CreateLocalAccessChainConvertPass());
optimizer.RegisterPass(CreateLocalSingleBlockLoadStoreElimPass());
optimizer.RegisterPass(CreateLocalSingleStoreElimPass());
diff --git a/Test/baseLegalResults/hlsl.aliasOpaque.frag.out b/Test/baseLegalResults/hlsl.aliasOpaque.frag.out
index def6a5df26889ea0b8f0a5a6103cc2fe7c081906..d69c296300e2740c91174ae6d926594c4497ce8e 100644
--- a/Test/baseLegalResults/hlsl.aliasOpaque.frag.out
+++ b/Test/baseLegalResults/hlsl.aliasOpaque.frag.out
@@ -15,11 +15,9 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
MemberName 9(OS) 0 "ss"
MemberName 9(OS) 1 "a"
MemberName 9(OS) 2 "tex"
- Name 44 "gss2"
Name 47 "gss"
Name 51 "gtex"
Name 62 "@entryPointOutput"
- Decorate 44(gss2) DescriptorSet 0
Decorate 47(gss) DescriptorSet 0
Decorate 51(gtex) DescriptorSet 0
Decorate 62(@entryPointOutput) Location 0
@@ -36,7 +34,6 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
36: 7(float) Constant 1050253722
37: 34(fvec2) ConstantComposite 35 36
43: TypePointer UniformConstant 6
- 44(gss2): 43(ptr) Variable UniformConstant
47(gss): 43(ptr) Variable UniformConstant
50: TypePointer UniformConstant 8
51(gtex): 50(ptr) Variable UniformConstant
diff --git a/Test/baseLegalResults/hlsl.flattenSubset.frag.out b/Test/baseLegalResults/hlsl.flattenSubset.frag.out
index 6872bb39354f4deedf07cb7cc1428ad7eab21613..8eedabae77ede746cc22f547b8bddec35dabd45a 100755
--- a/Test/baseLegalResults/hlsl.flattenSubset.frag.out
+++ b/Test/baseLegalResults/hlsl.flattenSubset.frag.out
@@ -2,7 +2,7 @@ hlsl.flattenSubset.frag
WARNING: AST will form illegal SPIR-V; need to transform to legalize
// Module Version 10000
// Generated by (magic number): 80003
-// Id's are bound by 66
+// Id's are bound by 72
Capability Shader
1: ExtInstImport "GLSL.std.450"
diff --git a/Test/baseLegalResults/hlsl.flattenSubset2.frag.out b/Test/baseLegalResults/hlsl.flattenSubset2.frag.out
index e8348a98dc5e5192db673d2b0db30dd2db7fb7ea..af394c70a52a1921172c3c573a1a6a76d770da33 100755
--- a/Test/baseLegalResults/hlsl.flattenSubset2.frag.out
+++ b/Test/baseLegalResults/hlsl.flattenSubset2.frag.out
@@ -20,10 +20,8 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
Name 25 "B"
MemberName 25(B) 0 "n"
MemberName 25(B) 1 "tex"
- Name 36 "someTex"
Name 49 "vpos"
Name 52 "@entryPointOutput"
- Decorate 36(someTex) DescriptorSet 0
Decorate 49(vpos) Location 0
Decorate 52(@entryPointOutput) Location 0
2: TypeVoid
@@ -34,8 +32,6 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
14(Nested): TypeStruct 6(float) 13
15(A): TypeStruct 14(Nested) 6(float)
25(B): TypeStruct 14(Nested) 13
- 35: TypePointer UniformConstant 13
- 36(someTex): 35(ptr) Variable UniformConstant
43: 6(float) Constant 0
44: 7(fvec4) ConstantComposite 43 43 43 43
48: TypePointer Input 7(fvec4)
diff --git a/Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out b/Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out
index 6d7d08b646559b3feb4a5566ee8adf54a1b4537c..d3e6660810410b2df178bc5228b79b87ddf64a3b 100755
--- a/Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out
+++ b/Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out
@@ -2,7 +2,7 @@ hlsl.partialFlattenLocal.vert
WARNING: AST will form illegal SPIR-V; need to transform to legalize
// Module Version 10000
// Generated by (magic number): 80003
-// Id's are bound by 132
+// Id's are bound by 165
Capability Shader
1: ExtInstImport "GLSL.std.450"
@@ -16,10 +16,8 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
MemberName 22(Packed) 2 "uv"
MemberName 22(Packed) 3 "x"
MemberName 22(Packed) 4 "n"
- Name 27 "tex"
Name 83 "pos"
Name 86 "@entryPointOutput"
- Decorate 27(tex) DescriptorSet 0
Decorate 83(pos) Location 0
Decorate 86(@entryPointOutput) BuiltIn Position
2: TypeVoid
@@ -36,72 +34,59 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
20: TypeArray 18(fvec2) 19
21: TypeInt 32 1
22(Packed): TypeStruct 13 17 20 6(float) 21(int)
- 23: TypePointer Function 22(Packed)
25: 21(int) Constant 0
- 26: TypePointer UniformConstant 13
- 27(tex): 26(ptr) Variable UniformConstant
- 29: TypePointer Function 13
31: 21(int) Constant 1
32: 6(float) Constant 0
33: 14(fvec3) ConstantComposite 32 32 32
34: TypePointer Function 14(fvec3)
- 36: 21(int) Constant 2
37: 6(float) Constant 1065353216
38: 18(fvec2) ConstantComposite 32 37
39: TypePointer Function 18(fvec2)
- 41: 21(int) Constant 3
- 42: TypePointer Function 6(float)
- 44: 21(int) Constant 4
- 45: TypePointer Function 21(int)
54: TypeBool
82: TypePointer Input 7(fvec4)
83(pos): 82(ptr) Variable Input
85: TypePointer Output 7(fvec4)
86(@entryPointOutput): 85(ptr) Variable Output
+ 130: TypePointer Function 17
+ 132: TypePointer Function 20
4(main): 2 Function None 3
5: Label
- 90: 23(ptr) Variable Function
+ 133: 132(ptr) Variable Function
+ 131: 130(ptr) Variable Function
84: 7(fvec4) Load 83(pos)
- 94: 13 Load 27(tex)
- 95: 29(ptr) AccessChain 90 25
- Store 95 94
- 96: 34(ptr) AccessChain 90 31 25
- Store 96 33
- 97: 39(ptr) AccessChain 90 36 25
- Store 97 38
- 98: 42(ptr) AccessChain 90 41
- Store 98 37
- 99: 45(ptr) AccessChain 90 44
- Store 99 41
+ 136: 34(ptr) AccessChain 131 25
+ Store 136 33
+ 137: 39(ptr) AccessChain 133 25
+ Store 137 38
Branch 100
100: Label
- 131: 21(int) Phi 25 5 119 102
+ 164: 21(int) Phi 25 5 119 102
LoopMerge 101 102 None
Branch 103
103: Label
- 105: 54(bool) SLessThan 131 31
+ 105: 54(bool) SLessThan 164 31
BranchConditional 105 106 101
106: Label
- 109: 39(ptr) AccessChain 90 36 131
- 110: 18(fvec2) Load 109
- 111: 34(ptr) AccessChain 90 31 131
- 112: 14(fvec3) Load 111
+ 138: 39(ptr) AccessChain 133 164
+ 110: 18(fvec2) Load 138
+ 139: 34(ptr) AccessChain 131 164
+ 112: 14(fvec3) Load 139
113: 18(fvec2) VectorShuffle 112 112 0 1
114: 18(fvec2) FAdd 113 110
- 115: 34(ptr) AccessChain 90 31 131
- 116: 14(fvec3) Load 115
+ 140: 34(ptr) AccessChain 131 164
+ 116: 14(fvec3) Load 140
117: 14(fvec3) VectorShuffle 116 114 3 4 2
- Store 115 117
+ Store 140 117
Branch 102
102: Label
- 119: 21(int) IAdd 131 31
+ 119: 21(int) IAdd 164 31
Branch 100
101: Label
- 120: 22(Packed) Load 90
- 130: 14(fvec3) CompositeExtract 120 1 0
- 124: 6(float) CompositeExtract 130 0
- 125: 6(float) CompositeExtract 130 1
- 126: 6(float) CompositeExtract 130 2
+ 142: 17 Load 131
+ 161: 14(fvec3) CompositeExtract 142 0
+ 124: 6(float) CompositeExtract 161 0
+ 125: 6(float) CompositeExtract 161 1
+ 126: 6(float) CompositeExtract 161 2
127: 7(fvec4) CompositeConstruct 124 125 126 32
128: 7(fvec4) FAdd 84 127
Store 86(@entryPointOutput) 128
diff --git a/Test/baseLegalResults/hlsl.partialFlattenMixed.vert.out b/Test/baseLegalResults/hlsl.partialFlattenMixed.vert.out
index b7e23f6489f7d5f9278271be71f02af98c4a9257..3ad1763190d51259ce493b66fe1c1ca5f459cf42 100755
--- a/Test/baseLegalResults/hlsl.partialFlattenMixed.vert.out
+++ b/Test/baseLegalResults/hlsl.partialFlattenMixed.vert.out
@@ -2,7 +2,7 @@ hlsl.partialFlattenMixed.vert
WARNING: AST will form illegal SPIR-V; need to transform to legalize
// Module Version 10000
// Generated by (magic number): 80003
-// Id's are bound by 36
+// Id's are bound by 45
Capability Shader
1: ExtInstImport "GLSL.std.450"
@@ -14,10 +14,8 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
MemberName 18(Packed) 0 "a"
MemberName 18(Packed) 1 "membTex"
MemberName 18(Packed) 2 "b"
- Name 23 "tex"
Name 32 "pos"
Name 35 "@entryPointOutput"
- Decorate 23(tex) DescriptorSet 0
Decorate 32(pos) Location 0
Decorate 35(@entryPointOutput) BuiltIn Position
2: TypeVoid
@@ -30,8 +28,6 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
16: 15(int) Constant 2
17: TypeArray 14 16
18(Packed): TypeStruct 13(int) 17 13(int)
- 22: TypePointer UniformConstant 17
- 23(tex): 22(ptr) Variable UniformConstant
31: TypePointer Input 7(fvec4)
32(pos): 31(ptr) Variable Input
34: TypePointer Output 7(fvec4)