memory/pl353-smc.c: Don't lie about the default timings

When the "arm,nand-cycle-t*" are missing from the device-tree, the driver
outputs the following warning and continues:
pl353-smc e000e000.memory-controller: arm,nand-cycle-t0 not in device tree
pl353-smc e000e000.memory-controller: Using default timing for
pl353-smc e000e000.memory-controller: 2Gb Numonyx MT29F2G08ABAEAWP NAND flash
pl353-smc e000e000.memory-controller: t_wp, t_clr, t_ar are set to 4
pl353-smc e000e000.memory-controller: t_rc, t_wc, t_rr are set to 2
pl353-smc e000e000.memory-controller: t_rea is set to 1

Simply entering this information in a devicetree when you actually have that
NAND part connected does not work however. The cause was that this information
is incorrect, the "4" and "2" are reversed as one can see in the three lines
of code that follow that output in the kernel.

This patch fixes this by outputting the timings as they are actually set.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>